• 전자공학회논문지C
• /
• 제36C권11호
• /
• pp.55-63
• /
• 1999

본 논문에서는 패키지의 전기적 특성이 CMOS 디지틀 회로에 미치는 영향을 해석하고 패키지 특성을 고려한 새로운 CMOS It 패키지 설계방법을 보인다. 집적회로 내의 게이트들이 동시에 스위칭 할 때 패키지에 기인한 동시 스위칭 노이즈 (Simultaneous Switching Noise: SSN)가 시스템의 성능에 미치는 영향에 대하여 해석적으로 고찰하여 패키지의 전기적 특성에 의한 제약조건을 만족시키면서 집적회로 패키지를 설계 할 수 있는 새로운 설계 식을 유도하고 이들 식을 이용한 설계방법을 제시한다. 또한 제시된 패키지 설계방 법의 타당성을 검증하기 위하여 0.3㎛ CMOS 회로에 대하여 범용회로 시뮬레이터인 HSPICE 시뮬레이션 결과와 본 논문에서 제시한 해석적 설계 방법에 따른 결과가 일치한다는 것을 보인다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2015년도 전력전자학술대회 논문집
• /
• pp.311-312
• /
• 2015

본 논문에서는 Unipolar PWM 스위칭 (Totem pole) 방법을 사용하는 단상인버터에서 나타나는 common mode noise를 저감시키는 스위칭 방법을 제안한다. 제안하는 방법은 출력전압의 중성점(N)을 입력전압 양단에 항상 고정하도록 스위칭을 하여 Common Mode Noise를 저감했다. 이를 Matlab Simulink를 사용한 모의해석과 실험을 통하여 Noise의 원인과 효과를 입증하였다.

• 한국전자파학회논문지
• /
• 제22권1호
• /
• pp.67-75
• /
• 2011

본 논문은 능동 소자의 스위칭 잡음이 함체 내부에 위치한 PCB에 인가될 때, 함체의 개구 방사에 미치는 영향을 분석한 연구이다. 이상적인 주기 펄스 입력 신호가 PCB에 인가된 경우의 개구 방사와 스위칭 잡음을 포함한 주기 입력 신호가 인가된 경우의 개구 방사를 비교하였다. DC-DC 컨버터의 등가회로를 이용해 능동 소자의 스위칭 잡음을 구현하였으며, 방사 전계 시뮬레이션을 위해 회로 시뮬레이터와 전자기장 시뮬레이터를 연동시켜 해석을 수행하였다. 또한, 측정 결과와 시뮬레이션 결과를 비교하였다.

• 제어로봇시스템학회논문지
• /
• 제20권1호
• /
• pp.12-17
• /
• 2014

In this paper, we propose a controller capable of reducing the effect of measurement errors under AC and DC noise. Typically, the control system measures data through a sensor. If sensor noise is included in a controller via the feedback channel, the signal is distorted and the entire system cannot work normally. Therefore, some appropriate action to counter the measurement error effect is essential in the controller design. Our controller is equipped with a gain-scaling factor and a compensator to reduce the effect of measurement error in the feedback signal. Also, we use a switching control strategy to enhance the performance of the controller regarding convergence speed. Our proposed controller can therefore effectively reduce the AC and DC noise of the sensor. We analyze the proposed controller by Laplace transform technique and our control method is verified via MATLAB simulation.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1998년도 전력전자학술대회 논문집
• /
• pp.265-268
• /
• 1998

This paper presents a soft-switching average current control PWM high power factor boost converter. Conventional boost ZVT-PWM converter has a disadvantage of hard-switching for auxiliary switch at turn-off. A soft switched auxiliary switch is proposed to achieve a high performance ZVT-PWM boost rectifier. The simulation and experimental results show that soft switching operation can be maintained for wide line and load range, which in turn improves the converter performance in terms of efficiency, switching noise and circuit reliability.

• Journal of Electrical Engineering and Technology
• /
• 제10권5호
• /
• pp.2197-2204
• /
• 2015

In recent years, medical image diagnosis has growing significant momentous in the medicinal field. Brain and lung image of patient are distorted with salt and pepper noise is caused by moving the head and chest during scanning process of patients. Reconstruction of these images is a most significant field of diagnostic evaluation and is produced clearly through techniques such as linear or non-linear filtering. However, restored images are produced with smaller amount of noise reduction in the presence of huge magnitude of salt and pepper noises. To eliminate the high density of salt and pepper noises from the reproduction of images, a new efficient fuzzy based median filtering algorithm with a moderate elapsed time is proposed in this paper. Reproduction image results show enhanced performance for the proposed algorithm over other available noise reduction filtering techniques in terms of peak signal -to -noise ratio (PSNR), mean square error (MSE), root mean square error (RMSE), mean absolute error (MAE), image enhancement factor (IMF) and structural similarity (SSIM) value when tested on different medical images like magnetic resonance imaging (MRI) and computer tomography (CT) scan brain image and CT scan lung image. The introduced algorithm is switching filter that recognize the noise pixels and then corrects them by using median filter with fuzzy two-sided π- membership function for extracting the local information.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제11권2호
• /
• pp.628-649
• /
• 2017

Security and resource-saving are both demands of the fifth generation (5G) wireless networks. In this paper, we study the secrecy spectrum efficiency (SSE) and secrecy energy efficiency (SEE) of a K-tier massive multiple-input multiple-output (MIMO) enabled heterogeneous cellular network (HetNet), in which artificial noise (AN) are employed for secrecy enhancement. Assuming (i) independent Poisson point process model for the locations of base stations (BSs) of each tier as well as that of eavesdroppers, (ii) zero-forcing precoding at the macrocell BSs (MBSs), and (iii) maximum average received power-based cell selection, the tractable lower bound expressions for SSE and SEE of massive MIMO enabled HetNets are derived. Then, the influences on secrecy oriented spectrum and energy efficiency performance caused by the power allocation for AN, transmit antenna number, number of users served by each MBS, and eavesdropper density are analyzed respectively. Moreover, the analysis accuracy is verified by Monte Carlo simulations.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
• /
• pp.129-132
• /
• 2001

This paper presents an efficient method to estimate the maximum SSN (simultaneous switching noise) for ground interconnection networks in CMOS systems using Taylor's series and analyzes the truncation error that has occurred in Taylor's series approximation. We assume that the curve form of noise voltage on ground interconnection networks is linear and derive a polynomial expression to estimate the maximum value of SSN using $\alpha$-power MOS model. The maximum relative error due to the truncation is shown to be under 1.87% through simulations when we approximate the noise expression in the 3rd-order polynomial.

• 전자공학회논문지C
• /
• 제35C권7호
• /
• pp.11-19
• /
• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2002년도 전력전자학술대회 논문집
• /
• pp.542-545
• /
• 2002

This paper deals with the optimization inverter design and minimization Conduced EMI noise by customizing IPM(Intelligent Power Module). Generally, In case of IPM, we realized that the trade-off relation between switching loss and spike voltage. Higher gate resistor causes tile lower spike voltage and the higher turn-off switching loss. But we know that the life cycle of inverter and the susceptibility of noise, so we optimized the gate resistor. Proposed method is that optimized the gate resistor suitable for the inverter and motor. The simulation and experimental results show that the spike voltage and Conduced EMI noise can be reduced without the additional circuit.