• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.362-365
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• 1999

In this paper, the method of reducing harmonics and correcting of power factor in single PWM converter associated with diode rectifier and boos converter is studied. The ac-dc converter in which the harmonic distortion in the input current is reduced using a third harmonic injected PWM is proposed. A lower switching power loss and easy configuration o control circuit are obtained by adopting discontinuous current mode. Simulation and experimental results of ac-dc converter with 5[KHz] switching frequency are presented and correction of power factor and reduction of total harmonic distortion was established.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2013년도 추계학술대회
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• pp.361-364
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• 2013

기존의 DC-DC 부스트 변환기에서 사용되는 non-overlapping gate driver는 dead-time이 고정되어 있기 때문에 body-diode conduction loss 또는 charge-sharing loss가 발생하는 문제점을 가지고 있다. 이러한 손실을 줄이기 위해 사용된 기존의 적응제어 방식의 경우는 CCM 동작 시 전력트랜지스터가 동시에 on이 되는 구간이 발생하여 시스템 효율이 감소하는 문제점이 있다. 따라서 본 논문 에서는 이러한 문제점을 해결할 dead-time 적응제어 기능과 power switching 기능을 갖는 DC-DC 부스트 변환기를 설계 하였다. CMOS 0.35um 공정을 사용하였고, 2.5V 입력으로 3.3V의 출력전압을 얻으며, 스위칭 주파수는 500kHz 이다. 부하전류 150mA일 때 가장 높은 95.3%의 효율을 얻었다. 설계된 회로의 칩 면적은 $1720um{\times}1280um$이다.

• Journal of Power Electronics
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• 제9권5호
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• pp.809-821
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• 2009

This paper proposes a new phase-shift full-bridge DC-DC converter by applying energy recovery circuits to a conventional full-bridge DC-DC converter in plasma display panel applications. The converter can achieve soft-switching in main-switches by an extra auxiliary resonant network even with the wide operating condition of both output load and input voltage. The un-coupled design guidelines to the main bridge-leg component parameters for soft-switching operation contribute to conduction loss reduction in the transformer primary side leading to efficiency improvement. The auxiliary switches in the resonant network also operate in zero-current switching. This paper analyzes the operation modes of the proposed scheme and presents the key design guidelines through steady state analysis. Also, the paper verifies the validity of the circuits by hardware experiments with a 1kW DC/DC converter prototype.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.1960-1962
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• 1998

Reference/modulating waveform continuity is not a necessary condition for the implementation of switching patterns for three-phase pulse-width modulated(PWM) converters. This is based on the fact that the converter phase-voltages do not need to be sinusoidal and switching pattern discontinuities do not degrade the quality of output/input voltage/current waveforms by introducing low-order harmonics if certain parameters are optimized. This paper introduces the selected harmonic elimination to reduce the switching frequency and low-order harmonics compared with continuous PWM techniques and some discontinues switching patterns for PWM converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 추계학술대회 논문집 학회본부
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• pp.156-158
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• 1994

In recent days, the various adjustable speed drives are widely employed at the industrial applications for the purpose of energy saving and speed control. In particular, for the machine control applications. the switching frequency is required to be increased for better dynamic performance of the drive. Moreover, this also leads to the reduction of the switching loss of the device. For IGBT (Insulated Gate Bipolar Transistor), the most widely used switching device in the inverters below the 100[kW] range, the falling and falling time is of the order about $200{\sim}300[ns]$. Therefore unexpected phenomena occurs such as voltage spikes due to high gradient of current at the switching instant, the weakening of motor insulation due to high gradient of voltage. In this paper, a new voltage gradient suppression technique is presented in both theoretically and experimentally.

• 전력전자학회논문지
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• 제24권4호
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• pp.259-267
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• 2019

An active clamp flyback (ACF) converter applies a clamp circuit and circulates the energy of leakage inductance to the input side, thereby achieving a zero-voltage switching (ZVS) operation and greatly reducing switching losses. The switching losses are further reduced by applying a gallium nitride field effect transistor (GaN-FET) with excellent switching characteristics, and ZVS operation can be accomplished under light load with boundary conduction mode (BCM) operation. Optimal design is performed on the basis of loss analysis by selecting magnetization inductance based on BCM operation and a clamp capacitor for loss reduction. Therefore, the size of the reactive element can be reduced through high-frequency operation, and a high-efficiency and high-power-density converter can be achieved. This study proposes an optimal design for a high-efficiency and high-power-density BCM ACF converter based on GaN-FETs and verifies it through experimental results of a 65 W-rated prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.529-533
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• 2001

• 전력전자학회논문지
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• 제22권4호
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• pp.345-352
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• 2017

In this paper, a non-dissipative snubber for reducing the switching losses in the step down converter is proposed. The conventional step down converter, e.g., buck converter, suffers from serious switching losses and consequentially heat generation because of its hard switching. Thus, it is unsuitable for high switching frequency operation. Reduction of the reactive components' size, such as an output inductor and capacitor, is difficult. The proposed snubber can slow down the increasing current slopes and switch voltage at turn-on and turn-off transients, thereby significantly reducing the switching loses. Additionally, the slowly increasing current during switch turn-on transition, can effectively solve the output rectifier diode reverse recovery problem. Therefore, the proposed non-dissipative snubber not only leads to the efficiency of converter operation at high switching frequency but also reduces the reactive components size in proportion to the switching frequency. To confirm the validity of the proposed circuit, theoretical analysis and experimental results from a 150 W, 1 MHz prototype are presented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.1018-1019
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• 2015

Recently, standby power reduction techniques of AC/DC adaptor were developed, consuming power almost arrived to 300mW level. The standby power losses are composed of the input filter loss 11.8mW, the control IC for AC/DC adaptor 18mW, the switching loss 9.53mW and the feedback loss 123mW. And there are the standby power reduction techniques. In this paper, in order to reduce the standby power of SMPS more, the loss due to a voltage difference between input and output is reduced by the control circuit which is composed of the low voltage driving circuit and voltage regulator. The low voltage driving circuit operates on the low voltage of input and off the high voltage. The low voltage driving IC was produced by the $1.0{\mu}m$, high voltage DMOS process.

• Journal of Power Electronics
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• 제18권3호
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.