• 한국정보통신학회논문지
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• 제15권9호
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• pp.1965-1970
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• 2011

본 논문에서는 그래프에 기초하여 유한체상의 스위칭함수를 도출하는 알고리즘과 이를 바탕으로 스위칭함수를 회로로 구현하는 방법을 제안하였다. 방향성그래프의 경로 수로부터 행렬방정식을 유도한 후에 이에 따른 스위칭 함수회로설계 알고리즘을 제안하였으며, 설계된 회로와 함께 방향성 그래프의 특성을 만족할 수 있게 노드들에 대한 코드를 할당하는 알고리즘을 제안하였다. 본 논문에서 제안한 알고리즘을 통해 설계한 스위칭함수회로는 기존의 방법에 비해 좀 더 최적화된 스위칭함수회로를 구현할 수 있었으며, 제안한 스위칭함수회로설계 알고리즘을 통해 임의의 자연수의 경로 수를 갖는 방향성 그래프에 대한 설계가 가능하였다. 또한, 입출력단자 수의 감소, 회로구성의 간략화, 연산속도의 향상과 비용감소 등의 이점이 있었다.

• 한국컴퓨터정보학회논문지
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• 제21권6호
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• pp.47-53
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• 2016

This paper deals with the capacity constrained time slot assignment problem(CTSAP) that a satellite switches to traffic between $m{\times}n$ ground stations using on-board $k{\leq}_{min}\{m,n\}$ k-transponders switching modes in SS/TDMA time-division technology. There was no polynomial time algorithm to solve the optimal solution thus this problem classified by NP-hard. This paper suggests a heuristic algorithm with O(mn) time complexity to solve the optimal solution for this problem. Firstly, the proposed algorithm selects maximum packet lengths of $\({mn \atop c}\)$ combination and transmits the cut of minimum packet length in each switching mode(MSMC). In the case of last switching mode with inefficient transmission, we applies a compensation strategy to obtain the minimum number of switching modes and the minimum makespan. The proposed algorithm finds optimal solution in polynomial time for all of the experimental data.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1949-1954
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• 2005

One of control methods for underactuated manipulators is known as a switching control which selects a partially-stable controller using a prespecified switching rule. A switching computed torque control with a fuzzy energy region method was proposed. In this approach, some partly stable controllers are designed by the computed torque method, and a switching rule is based on fuzzy energy regions. Design parameters related to boundary curves of fuzzy energy regions are optimized offline by a genetic algorithm (GA). In this paper, we discuss on parameters obtained by GA. The effectiveness of the switching fuzzy energy method is demonstrated with some simulations.

• 대한전자공학회논문지SD
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• 제37권7호
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• pp.50-57
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• 2000

본 논문에서는 고속 FPGA 설계를 위한 논리 수준의 조합회로 합성 알고리듬을 제안한다. FPGA는 현장에서 직접 제작이 가능하고 제작 시간이 짧으며 제작 비용이 저렴하므로 초기 prototype 시스템의 제작에 자주 사용되고 있으나, ASIC 칩에 비해 지연시간이 크고 집적도가 떨어지는 단점이 있다. 제안된 알고리듬은 회로의 지연시간을 줄이기 위해 critical path를 분할한 후 분할된 회로를 동시에 수행하는 구조의 회로를 생성한다. MCNC 표준 테스트 회로에 대한 실험에서 제안된 지연시간 최적화 알고리듬이 기준 알고리듬에 비해 지연시간이 평균 19.1% 감소된 회로를 생성함을 보였다.

• 전자공학회논문지
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• 제52권5호
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• pp.214-221
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• 2015

본 논문에서는 측정 잡음에 의해서 출력 신호가 왜곡된 이산 시간 선형 스위치드 시스템의 스위칭 신호와 상태 변수를 관측하기 위한 강인한 추정 및 검출 기법을 제시한다. 첫째, 최소 거리 기준에 기초한 작동 모드 추정 알고리즘이 제안된다. 이 과정에서 모드의 추정값을 얻게 되고, 이를 이용하여 상태 변수 또한 관측할 수 있게 된다. 둘째, 주어진 스위치드 시스템의 작동 모드 변화 시점, 즉, 스위칭이 언제 발생하는지 검출하는 알고리즘이 고안된다. 시스템에 인가되는 측정 잡음이 유계라는 가정 하에, 제안된 추정 알고리즘은 주어진 스위치드 시스템의 작동 모드를 정확하게, 그리고 상태 변수를 근사적으로 추정하며, 검출 알고리즘은 실제 스위칭이 발생한 후, 미리 정해진 지연 시간이 지나가기 전에 스위칭 시간을 검출할 수 있다.

• 대한전기학회논문지
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• 제41권8호
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• pp.902-913
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• 1992

There have been several control schemes for the single input systems with unmeasurable state variables using variable structure control(VSC) theory. In the previous VSC, the systems must be represented in phase canonical form and the complete measurements for each state variable must be assumed. In order to eliminate these restrictions several VSC methods were proposed. And especially for the systems in phase canonical form with unmeasurable state variables, the reduced order switching function algorithm was proposed. But this method has many drawbacks and can not be used in the case of general form (not phase canonical form) dynamic system. Therefore this paper propose new construction method of switching fuction for the systems in phase canonical form, which reduce the restriction of reduced order switching function algorithm. And this algorithm can be realized for any state representation and adopted in the systems where not all states are available for switching function synthesis or control.

• Journal of Power Electronics
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• 제17권2호
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• pp.323-333
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• 2017

This paper proposes a model-based optimal control algorithm for the clamp switch of a zero-voltage switching (ZVS) bidirectional DC-DC converter. The bidirectional DC-DC converter (BDC) can accomplish the ZVS operation using the clamp switch. The minimum current for the ZVS operation is maintained, and the inductor current is separated from the input and output voltages by the clamp switch in this topology. The clamp switch can decrease the inductor current ripple, switching loss, and conduction loss of the system. Therefore, the optimal control of the clamp switch is significant to improve the efficiency of the system. This paper proposes a model-based optimal control algorithm using phase shift in a micro-controller unit. The proposed control algorithm is demonstrated by the results of PSIM simulations and an experiment conducted in a 1-kW ZVS BDC system.

• 한국군사과학기술학회지
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• 제10권3호
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• pp.129-138
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• 2007

Recently, Direction Finding(DF) System is using switching DF algorithm to reduce system-weight by eliminating RF cable as much as possible. Also, Correlation Vector Direction Finding(CVDF) algorithms is being used for Fast Direction finding in tactical environment. In this paper, I will give you burst error elimination algorithms and compare the performance in case we use switching CVDF algorithm. Although antenna array is not working, we will successfully perform direction finding when we use this burst error elimination algorithms. Also, we will be completely capable of DF mission despite of meeting the unwanted situation that the monitoring signal disappear in case we use Switching Direction Finding algorithms. That situation frequently occurs under the Frequency Hopping signal circumstances.

• Journal of Electrical Engineering and Technology
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• 제12권5호
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• 전기학회논문지
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• 제60권11호
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• pp.2007-2016
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• 2011

In this paper, a new algorithm for alleviating overloads in power networks by the use of line power tracing and sensitivity is proposed to perform line switching and bus separation effectively. Also, a new bus separation index based on line power tracing is presented to find the bus to be separated for relieving overloads effectively. By applying the sensitivity of the line flow with respect to the change of the line impedance, both switching-on and switching-off of the lines for alleviating overloads in power networks are performed systematically at once. The number of the considered cases for line switching and bus separation can be greatly reduced and the best combination of line switching and bus separation can be acquired efficiently by the use of the sensitivity and the bus separation index. In order to show the effects of this algorithm, it is applied to a small scale power system of IEEE 39-bus system and practical power systems of KEPCO.