• Title/Summary/Keyword: Switch circuit

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Domestic Efforts for SFCL Application and Hybrid SFCL (국내 초전도 한류기 요구와 하이브리드 초전도 한류기)

  • Hyun, O.B.;Kim, H.R.;Yim, Y.S.;Sim, J.;Park, K.B.;Oh, I.S.
    • Progress in Superconductivity
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    • v.10 no.1
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    • pp.60-67
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    • 2008
  • We present domestic efforts for superconducting fault current limiter (SFCL) application in the Korea Electric Power Corporation (KEPCO) grid and pending points at issue. KEPCO's decision to upgrade the 154 kV/22.9 kV main transformer from 60 MVA to 100 MVA cast a problem of high fault current in the 22.9 kV distribution lines. The grid planners supported adopting an SFCL to control the fault current. This environment friendly to SFCL application must be highly dependent upon the successful development of SFCL having specifications that domestic utility required. The required conditions are (1) small size of not greater than twice of 22.9 kV gas insulated switch-gear (GIS), (2) sustainability of current limitation without the line breaking by circuit breakers (CB) for maximum 1.5 seconds. Also, optionally, recommended is (3) the reclosing capability. Conventional resistive SFCLs do not meet (1) $\sim$ (3) all together. A hybrid SFCL is an excellent solution to meet the conditions. The hybrid SFCL consists of HTS SFCL components for fault detection and line commutation, a fast switch (FS) to break the primary path, and a limiter. This characteristic structure not only enables excellent current limiting performances and the reclosing capability, but also allows drastic reduction of HTS volume and small size of the cryostat, resulting in economic feasibility and compactness of the equipment. External current limiter also enables long term limitation since it is far less sensitive to heat generation than HTS. Semi-active operation is another advantage of the hybrid structure. We will discuss more pending points at issues such as maintenance-free long term operation, small size to accommodate the in-house substation, passive and active control, back-up plans, diagnosis, and so on.

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Design of High Speed Dynamic Latch Comparator with Reduced Offset using Initialization Switch (초기화 스위치를 이용해 오프셋을 감소시킨 고속 다이나믹 래치 비교기 설계)

  • Seong, Kwang-Su;Hyun, Eu-Gin;Seo, Hee-Don
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.10
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    • pp.65-72
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    • 2000
  • In this paper, we propose an efficient technique to minimize the input offset of a dynamic latch comparator. We analyzed offset due to charge injection mismatching and unwanted positive feedback during sampling phase. The last one was only considered in the previous works. Based on the analysis, we proposed a modified dynamic latch with initialization switch. The proposed circuit was simulated using 0.65${\mu}m$ CMOS process parameter with 5v supply. The simulation results showed that the input offset is less than 5mV ant 200MHz sampling frequency and the input offset is improved about 80% compared with previous work in $5k{\Omega}$ input resistance.

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A 900 MHz ZigBee CMOS RF Transceiver Using Switchless Matching Network (무스위치 정합 네트워크를 이용한 900 MHz ZigBee CMOS RF 송수신기)

  • Jang, Won Il;Eo, Yun Seong;Park, Hyung Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.8
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    • pp.610-618
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    • 2017
  • This paper presents a 868/915 MHz CMOS RF transceiver for the ZigBee application. Using a switchless matching network, the off chip switch is removed to achieve the low cost RF transceiver, and by the elimination of the switch's insertion loss we can achieve the benefits for the RF receiver's noise figure and transmitter's power efficiency at the given output power. The receiver is composed of low-noise amplifier, mixer, and baseband analog(BBA) circuit. The transmitter is composed of BBA, mixer, and driver amplifier. And, the integer N type frequency synthesizer is designed. The proposed ZigBee RF full transceiver is implemented on the $0.18{\mu}m$ CMOS technology. Measurement results show that the maximum gain and the noise figure of the receiver are 97.6 dB and 6.8 dB, respectively. The receiver consumes 32 mA in the receiver mode and the transmitter 33 mA in the transmission mode.

A Study on the High Performance Slip Power Recovery System in Induction Motor (유도전동기의 고성능 슬립전력 회수방식에 대한 연구)

  • Park, Han-Ung;Park, Seong-Jin;An, Jin-U;Park, Jin-Gil;Kim, Cheol-U;Hwang, Myeong-Mun
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.8
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    • pp.431-439
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    • 1999
  • Among the variable-speed AC motor drive systems, the static slip power recovery system has been widely adopted in large power drives because a high efficiency drive can be obtained by recovering the slip power to the AC line. Although many improvements have been made in this system, several problems also remain such as the need of transformer in inverter AC side, which results in limiting speed control range and increasing the losses, production of reactive power by the control of inverter firing angle, harmonics in line currents, and so on. This paper presents the novel high performance slip power recovery system using the boost converter and small size filter in the rotor circuit, which recovers slip power of a wound rotor induction machine to AC supply efficiently with the aid of the boost converter, in which most of the problems in conventional system can be solved. The speed can be controlled by the duty ratio of the converter switch, not by inverter firing angle. As a results, the proposed system can operate in high power factor and the harmonic currents caused by the inverter and rectifier can be considerably suppressed. The validity of the proposed system verified by demonstrating the good agreement in the simulation and experimental results.

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Isolation Control High Speed Transfer Switch for Upgrade Reliability of Uninterruptible Power Supply (USP의 신뢰성 향상을 위한 독립제어 고속절환장치)

  • Jung, Hyun-Chul;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.4
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    • pp.278-286
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    • 2008
  • This paper investigates the fault generation type and the cause of output interruptionsin bulky with $30^{\sim}500[KVA]$ double conversion UPS, and proposes the fault detection method to improve the reliability of power supply used in the critical load in industry. Identifies its existing way of detecting a quality of inverter output it to bypass when exceeds its expectation. Under a UPS managing system, when an inner (Power device, Controller, CPU) fault occurs it disrupts the power supply and these occurrences has been verified by the results of experiments and application results. To overcome these problems, the proposed method constructs independently a fault-detection, a bypass-control device and a triple power supply apart from the conventional UPS operation. Also the detection point is changed to the preceding of a circuit breaker, a reference of fault detection is modified to avoid any clash and the breaking equipment is attached to intercept a spread of accident. As a result of applications of these developed systems to 242 UPS which was installed purposefully to the communication power supply, the service errors has not occurred in the UPS for two years since 2006.

EMI Noise Source Reduction of Single-Ended Isolated Converters Using Secondary Resonance Technique

  • Chen, Zhangyong;Chen, Yong;Chen, Qiang;Jiang, Wei;Zhong, Rongqiang
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.403-412
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    • 2019
  • Aiming at the problems of large dv/dt and di/dt in traditional single-ended converters and high electromagnetic interference (EMI) noise levels, a single-ended isolated converter using the secondary resonance technique is proposed in this paper. In the proposed converter, the voltage stress of the main power switch can be reduced and the voltage across the output diode is clamped to the output voltage when compared to the conventional flyback converter. In addition, the peak current stress through the main power switch can be decreased and zero current switching (ZCS) of the output diode can be achieved through the resonance technique. Moreover, the EMI noise coupling path and an equivalent model of the proposed converter topology are presented through the operational principle of the proposed converter. Analysis results indicate that the common mode (CM) EMI noise and the differential mode (DM) EMI noise of such a converter are deduced since the frequency spectra of the equivalent controlled voltage sources and controlled current source are decreased when compared with the traditional flyback converter. Furthermore, appropriate parameter selection of the resonant circuit network can increase the equivalent impedance in the EMI coupling path in the low frequency range, which further reduces the common mode interference. Finally, a simulation model and a 60W experimental prototype of the proposed converter are built and tested. Experimental results verify the theoretical analysis.

A Study on Converter Topology to Drive Switched Reluctance Motor (SRM) (스위치드 릴럭턴스 전동기(SRM) 구동용 Converter Topology 연구)

  • Yoon, Yongho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.3
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    • pp.129-135
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    • 2021
  • Switched Reluctance Motor (SRM) has a characteristic that the inductance changes very nonlinearly depending on the magnitude of the current and the relative position of the rotor and stator, and the torque is generated In consideration of these problems, many studies have been conducted on a topology for driving that can improve efficiency and performance in an existing asymmetric bridge converter in order to simplify the circuit and economic efficiency. Therefore, in this paper, we want to check the performance by comparing and analyzing each converter used by applying it as a topology for SRM driving. The driving converters applied to the comparison and analysis are Conventional C-dump, Modified C-dump, Energy efficient C-dump, Resonant C-dump converter with C-dump converter type structure and the most widely used asymmetric bridge converter and 6-Switch inverter that used for general motors.

Design of Power IC Driver for AMOLED (AMOLED 용 Power IC Driver 설계)

  • Ra, Yoo-Chan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.5
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    • pp.587-592
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    • 2018
  • Because the brightness of an AMOLED is determined by the flowing current, each pixel of AMOLED operates via A current driving method. Therefore, it is necessary to supply power to adjust the amount of current according to THE user's requirement for AMOLED driving. In this study, an IP driver block was designed and a simulation was conducted for an AMOLED display, which supplies power as selected by users. The IP driver design focused on regulating the output power due to the OLED characteristics for the diode electric current according to the voltage to be activated by pulse-skipping mode (PSM) under low loads, and 1.5 MHz pulse-width modulation (PWM) for medium/high loads. The IP driver was designed to eliminate the ringing effects appearing from the dis-continue mode (DCM) of the step-up converter. The ringing effects destroy the power switch within the IC, or increase the EMI to the surrounding elements. The IP driver design minimized this through a ringing killer circuit. Mobile applications were considered to enable true shut-down capability by designing the standby current to fall below $1{\mu}A$ to disable it. The driver proposed in this paper can be applied effectively to the same system as the AMOLED display dual power management circuit.

A Study on Power Conversion System for Fuel Cell Controlled by Micro-Processor (마이크로프로세서에 의해 제어되는 연료전지용 전력변환장치에 관한 연구)

  • Kim, Ju-Yong;Jung, Sang-Hwa;Mun, Sang-Pil;Ryu, Jae-Yup;Suh, Ki-Young
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.5
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    • pp.10-24
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    • 2007
  • In the dissertation, a power conversion system for fuel cell is composed of a PWM inverter with LC filter in order to convert fuel cell voltage to a single phase 220[V]. In addition, new insulated DC-DC converters are proposed in order that fuel cell voltage is boosted to 380[V]. In this paper, it requires smaller components than existing converters, which makes easy control. The proposed DC-DC converter controls output power by the adjustment of phase-shift width using switch $S_5\;and\;S_6$ in the secondary switch which provides 93-97[%] efficiency in the wide range of output voltage. Fuel cell simulator is implemented to show similar output characteristics to actual fuel cell. Appropriate dead time td enables soft switching to the range where the peak value of excitation current in a high frequency transformer is in accordance with current in the primary circuit. Moreover, appropriate setting to serial inductance La reduces communication loss arisen at light-load generator and serge voltage arisen at a secondary switch and serial diode. Finally, TMS320C31 board and EPLD using PWM switching technique to act a single phase full-bridge inverter which is planed to make alternating current suitable for household

The design of the high efficiency DC-DC Converter with Dynamic Threshold MOS switch (Dynamic Threshold MOS 스위치를 사용한 고효율 DC-DC Converter 설계)

  • Ha, Ka-San;Koo, Yong-Seo;Son, Jung-Man;Kwon, Jong-Ki;Jung, Jun-Mo
    • Journal of IKEEE
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    • v.12 no.3
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    • pp.176-183
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    • 2008
  • The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

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