• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.23 no.3
• /
• pp.183-189
• /
• 2010

In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

• Applied Chemistry for Engineering
• /
• v.10 no.2
• /
• pp.225-230
• /
• 1999

Low pressure metal organic chemical vapor deposition (LPMOCVD) of $Li_2O$ solid thin films from Li(DPM) in nitrogen-oxygen or argon-oxygen atmosphere was experimentally investigated by using a small hot wall tubular type reactor. XRD and ESCA analysis revealed that $Li_2CO_3$ film grew in nitrogen-oxygen atmosphere and $Li_2O$ grew in argon-oxygen atmosphere. The grown lithium oxide or carbonate reacted with silicon or silica base materials to produce silicates. The CVD model analysis by means of the well-known micro trench method and Monte Carlo simulation was not fully successful, but a set of data on gas phase reaction rate constant and surface reaction constant was obtained.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.9
• /
• pp.638-643
• /
• 2003

Channel width dependence of hot-carrier effect in nMOSFET with shallow trench isolation is analyzed. $I_{sub}$- $V_{G}$ and $\Delta$ $I_{ㅇ}$ measurement data show that MOSFETs with narrow channel-width are more susceptible to the hot-carrier degradation than MOSFETs with wide channel-width. By analysing $I_{sub}$/ $I_{D}$, linear $I_{D}$- $V_{G}$ characteristics, thicker oxide-thickness at the STI edge is identified as the reason for the channel-width dependent hot-carrier degradation. Using the charge-pumping method, $N_{it}$ generation due to the drain avalanche hot-carrier (DAHC) and channel hot-electron (CHE) stress are compared. are compared.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.74-74
• /
• 2009

The ArF PR mask was. developed to overcome the limit. of sub 40nm patterning technology with KrF PR. But ArF PR difficult to meet the required PR selectivity by thin PR thickness. So need to the multi-stack mask such as amorphous carbon layer (ACL). Generally capacitively coupled plasma (CCP) etcher difficult to make the high density plasma and inductively coupled plasma (ICP) type etcher is more suitable for multi stack mask etching. Hybrid Coupled Plasma source (HCPs) etcher using the 13.56MHz RF power for ICP source and 2MHz and 27.12MHz for bias power was adopted to improve the process capability and controllability of ion density and energy independently. In the study, the oxide trench which has the multi stack layer process was investigated with the HCPs etcher (iGeminus-600 model DMS Corporation). The results were analyzed by scanning electron microscope (SEM) and it was found that etching characteristic of oxide trench profile depend on the multi-stack mask.

• Proceedings of the KIEE Conference
• /
• 1998.11c
• /
• pp.723-725
• /
• 1998

STI CMP process are substituting gradually for LOCOS(Local Oxidation of Silicon) process to be available below sub-0.5um technology and to get planarized. The other hand, STI CMP process(especially STI CMP with RIE etch back process) has some kinds of defect like Nitride residue, Torn Oxide defect, etc. In this paper, we studied how to reduce Torn Oxide defects after STI CMP with RIE etch back process. Although Torn Oxide defects which occur on Oxide on Trench area is not deep and not sever, Torn oxide defects on Moat area is sometimes very deep and makes the yield loss. We did test on pattern wafers witch go through Trench process, APCVD process, and RIE etch back process by using an REC 472 polisher, IC1000/SUV A4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the root causes of torn oxide defects.

• Journal of the Korean Society of Hazard Mitigation
• /
• v.10 no.6
• /
• pp.147-154
• /
• 2010

In this study, flood control effects for infiltration trench which is one of runoff reduction facilities were analyzed based on hydraulic experiments. Hydraulic experiments were conducted using 25 cm diameter circular pipe, and water depths for boundary conditions are 5, 10, 15, 20, 25 cm. Infiltration volume, runoff volume, runoff initiation time, final infiltration capacity and final infiltration capacity reached time etc. were measured from infiltration trench hydraulic experiment. We assumed that drainage area of each infiltration trench is $130\;m^2$ ($6.5\;m{\times}20\;m$) and calculated CN with area based on those experimental characteristics. In AMC-I condition, the calculated CN with five water depths is 84 for 2% pipe slope, 83 for 5% pipe slope. In AMC-III condition, the calculated CN is 84 for 2% and 5% pipe slope.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.5
• /
• pp.1-7
• /
• 2002

Deep sub-micron bulk CMOS circuits require gate electrode materials such as metal silicide and titanium silicide for gate oxides. Many authors have conducted research to improve the quality of the sub-micron gate oxide. However, few have reported on the electrical quality and reliability of an ultra-thin gate. In this paper, we will recommend a novel shallow trench isolation structure and a two-step TiS $i_2$ formation process to improve the corner metal oxide semiconductor field-effect transistor (MOSFET) for sub-0.1${\mu}{\textrm}{m}$ VLSI devices. Differently from using normal LOCOS technology, deep sub-micron CMOS devices using the novel shallow trench isolation (STI) technology have unique "inverse narrow-channel effects" when the channel width of the device is scaled down. The titanium silicide process has problems because fluorine contamination caused by the gate sidewall etching inhibits the silicide reaction and accelerates agglomeration. To resolve these Problems, we developed a novel two-step deposited silicide process. The key point of this process is the deposition and subsequent removal of titanium before the titanium silicide process. It was found by using focused ion beam transmission electron microscopy that the STI structure improved the narrow channel effect and reduced the junction leakage current and threshold voltage at the edge of the channel. In terms of transistor characteristics, we also obtained a low gate voltage variation and a low trap density, saturation current, some more to be large transconductance at the channel for sub-0.1${\mu}{\textrm}{m}$ VLSI devices.

• The Journal of Engineering Geology
• /
• v.26 no.1
• /
• pp.33-49
• /
• 2016

The study area, located in Sinam-ri, Ulsan, in the southeastern part of the Korean Peninsula, is mainly composed of hornblende granite (ca. 65 Ma). Fracturing and reactivation of a fault striking ENE-WSW was strongly controlled by the intrusion of a mafic dyke (ca. 44 Ma), which behaves as a discontinuity in the mechanically homogeneous pluton, increasing the instability of the basement in this area. A geometric and kinematic study undertaken to interpret the faults and fractures was performed in a trench excavated almost perpendicular to the orientation of the dyke. The analysis of structural elements, such as dykes, veins, and faults, is used to infer the deformation history and to determine the paleostress orientations at the time of formation of the structures. The deformation history established based on this analysis is as follows: (1) NNE-SSW, E-W, ENE-WSW, and NE-SW trending fractures had already developed in the pluton before dyke intrusion; (2) felsic dykes intruded under conditions of σ_Hmax oriented N-S and σ_Hmin oriented E-W; (3) mafic dykes intruded under conditions of σ_Hmax oriented E-W and σ_Hmin oriented N-S; (4) dextral reactivation of the main fault associated with the development of hydrothermal quartz veins under conditions of σ_Hmax oriented E-W and σ_Hmin oriented N-S; (5) sinistral reactivation of the main fault and high-angle normal faults under conditions of σ_Hmax oriented NE-SW and σ_Hmin oriented NW-SE; and (6) dextral reactivation of the main fault and NE-SW low-angle reverse faults under conditions of σ_Hmax oriented NW-SE and σ_Hmin oriented NE-SW. These results are consistent with the tectonic history of the Pohang-Ulsan block in the southeastern part of the Korean Peninsula, and indicates the tectonic deformation of the southern area of the Ulsan fault bounded by Yangsan fault was analogous to that of the Pohang-Ulsan area from the Cenozoic. This work greatly aids the selection of sites for critical facilities to prevent potential earthquake hazards in this area.

• Journal of Wetlands Research
• /
• v.21 no.4
• /
• pp.384-391
• /
• 2019

Nutrients in stormwater runoff have raised concerns regarding water quality degradation in the recent years. Low impact development (LID) technologies are types of nature-based solutions developed to address water quality problems and restore the predevelopment hydrology of a catchment area. Two LID facilities, infiltration trench (IT) and infiltration planter (IP), are known for their high removal rate of nutrients through sedimentation and vegetation. Long-term monitoring was conducted to assess the performance and cite the advantages and disadvantages of utilizing the facilities in nutrient removal. Since a strong ionic bond exists between phosphorus compounds and sediments, reduction of total phosphorus (TP) (more than 76%), in both facilities was associated to the removal of total suspended solids (TSS) (more than 84%). The efficiency of nitrogen in IP is 28% higher than IT. Effective nitrification occurred in IT and particulate forms of nitrogen were removed through sedimentation and media filters. Decrease in ammonium- nitrogen (NH₄-N) and nitrite-nitrogen (NO₂-N), and increase in nitrate-nitrogen (NO₃-N) fraction forms indicated that effective nitrification and denitrification occurred in IP. Hydrologic factors such as rainfall depth and rainfall intensity affected nutrient treatment capabilities of urban stormwater LID facilities The greatest monitored rainfall intensity of 11 mm/hr for IT yielded to 34% and 55% removal efficiencies for TN and TP, respectively, whereas, low rainfall intensities below 5 mm resulted to 100 % removal efficiency. The greatest monitored rainfall intensity for IP was 27 mm/hr, which still resulted to high removal efficiencies of 98% and 97% for TN and TP, respectively. Water quality assessment showed that both facilities were effective in reducing the amount of nutrients; however, IP was found to be more efficient than IT due to its additional provisions for plant uptake and larger storage volume.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.9
• /
• pp.713-717
• /
• 2011

This paper was carried out design of 600 V GaN power MOSFET Modeling. We decided trench gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 600 V breankdown voltage and $0.4\;m{\Omega}cm^2ultra$ low on resistance. At the same time, we carried out field ring simulation for obtaining high voltage.