• Journal of Power Electronics
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• v.19 no.1
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• pp.307-315
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• 2019

Condition monitoring has been recognized as an effective and low-cost method to enhance the reliability and improve the maintainability of power electronic converters. In power electronic converters, high-frequency oscillation occurs during the switching transients of power transistors, which is known as ringing. The ringing frequency mainly depends on the values of the parasitic capacitance and stray inductance in the oscillation loop. Although circuit stray inductance is an important factor that leads to the ringing, it does not change with transistor aging. A shift in either the inside inductance or junction capacitance is an important failure precursor for power transistors. Therefore, ringing frequency can be used to monitor the health of power transistors. However, the switching actions of power transistors usually result in a dynamic behavior that can generate oscillation signals mixed with background noise, which makes it hard to directly extract the ringing frequency. A frequency extraction method based on empirical mode decomposition (EMD) and Fast Fourier transformation (FFT) is proposed in this paper. The proposed method is simple and has a high precision. Simulation results are given to verify the ringing analysis and experimental results are given to verify the effectiveness of the proposed method.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.2
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• pp.72-78
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• 2001

A compact size high voltage pulse generator with nanosecond rise time has been designed and investigated experimentally. The inductance of a pulse generator can be reduced by fixing the Marx generator and pulse forming network components into a single cylindrical unit. As a result, nanosecond rise time about $8{\sim}10[ns]$ and pulse width of several hundred [ns] can be obtained from a modified Marx pulse generator. And parametric studies showed that the rise time of the output pulse was depended little on the change of the load resistance and the charging capacitance while, the pulse width of the output pulse was depended greatly upon the change of the load resistance and the charging capacitance. The theoretical showed the possibility to design the laboratory-size pulse generator very fast rising time and a proper pulse width by minimizing stray inductance and varying resistance and capacitance.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.12
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• pp.2166-2172
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• 2007

In this study a low-signal equivalent circuit based on the Double Schottky Barrier model is proposed for ZnO-based varistor. Since pin-lead inductance and stray capacitance are considered in pin-lead type ZnO varistor these inductance and capacitance could be removed from the experimental dielectric data of the varistor. According to the equivalent circuit simulation results the higher the varistor-voltage of varistor sample the capacitance of dielectric layer is larger, and the capacitances of semiconducting layer and depletion layer are smaller, while the parallel resistances of semiconducting layer and depletion layer are more larger values. Spectra of the dielectric loss factor $tan{\delta}$ show 2 peaks in low frequency and high frequency regions respectively. The low-frequency peak is due to the relaxation by deep donors and the high-frequency peak is due to the relaxation by shallow donors. Above results are well consistent with the theoretical mechanism of ZnO varistor.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.83-88
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• 2003

This paper analyses a fault operation due to the effect of miller capacitance, which severely influences the performance of the IPMs based on computer-aided simulations, and also it presents a good solution to solve that problem. A miller capacitance existed between gate and collect is very closely related to the stray capacitance formed between gate and emitter, and the value of gate resistor. These relationships are proved by the computer-aided simulation. Based on the PSpice simulation results, a customized IPM employing an auxiliary circuit is presented to minimize a fault operation. And it is compared to the standard IPM by the experimental waveform. As a result, it is verified that a customized IPM has a voltage margin to prevent a fault operation approx. 3 [V].

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.30-35
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• 2000

The pulsed plasma wire-plate reactor was analyzed on the basis of experiment, EMTP simulation and modelling method. Though the reactor has a non-linear impedance characteristics, we demonstrate that the reactor impedance can be approximately analyzed with the measured initial capacitance and average resistive component of flat zone. Using this modelling method, the influence of the reactor capacitance on the impedance matching between pulse generator and reactor can be investigated. From this, we found that the energy of 95% was delivered form pulse generator to reactor at the ratio of $C_r/C_p\cong 0.3,\; where\; C_p\; is\; pulse\; generator\; capacitance, C_r$ is reactor capacitance.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.1
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• pp.88-96
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• 2016

In this paper, the GaN FET based phase-shift full-bridge dc-dc converter design is implemented. Switch characteristics of GaN FET were analyzed in detail by comparing state-of-the-art Si MOSFET. Owing to the low conduction resistance and parasitic capacitance, it is expected to GaN FET based power conversion system has improved performance. However, GaN FET is vulnerable to electric interference due to the relatively low threshold voltage and fast switching transient. Therefore, it is necessary to consider PCB layout to design GaN FET based power system because PCB layout is the main reason of stray inductance. To reduce the electric noise, gate voltage of GaN FET is analyzed according to operation mode of phase-shift full-bridge dc-dc converter. Two 600W phase-shifted full-bridge dc-dc converter are designed based on the result to evaluate effects of stray inductance.

• Proceedings of the KIEE Conference
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• 1999.07e
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• pp.2186-2188
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• 1999

A high frequency and energy density pulse transformer is a critical component of a high voltage power supply in a traveling wave tube (TWT) amplifier system. In this paper, processes of design, manufacturing, and test of the transformer are discussed. Primary voltage of the transformer is 240 V. The transformer secondary have two outputs which are 4100 V (Helix) and 2050 V (Collector). Total output power is 860 W. Normal operating frequency of the transformer is 10 kHz. In high energy density pulse transformers, temperature rise is a main problem during its operation. From our study, it was found that resonant current due to leakage inductance and stray capacitance was the main cause of temperature rise. This happens because of the inherently high turn-ratio in high voltage transformers. Solutions to reduce stray components are presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.519-520
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• 2008

교류에서의 전기저항값은 저항 elements 사이에서 나타나는 stray 전기용량과 elements의 길이에서 유도되는 인덕턴스의 영향으로 직류에서의 저항값과 차이를 보이게 된다. 이러한 직류와 교류에서의 저항값 차이가 대단히 작게 나면서 직류에서와 측정하는 교류에서의 저항값의 차이를 계산에 의해서 산출할 수 교류저항 표준기가 개발되었다. 개발된 교류저항표준기는 bi-filar 구조의 1 $k\Omega$로서, 1.6 kHz에서 직류/교류 저항값의 차이는 0.02 ${\mu}{\Omega}/{\Omega}$ 보다 작으며, 시정수는 1 kHz에서 $(8{\pm}2)\times10^{-10}$으로 측정되었다. 개발된 교류저항 표준기는 교류저항 국가표준에 최상급 표준기로 사용이 되어질 것이다.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1995.10a
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• pp.466-469
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• 1995

This paper presents a design and performance of the 6 D.O.F linear motion table with a magnetic bearing suspension. The linear positioning of the table with a 150mm stroke is driven by a brushless DC Linear motor and the other attitudes of the stage are controlled by the analog PD controller with magnetic bearing actuators. Each magnetic bearing unit which consists of 3 electromagnets, 3 capacitance probes and 3 backup bearings affords controlled forces by detecting the air gap between the probes and guideways. An integral type capacitance probe amplifier is equipped on the upper plate of the table so that the probe line to the probe amplifier can be shorter therefore the problems due to the stray capacitance and noise can be reduced. Form the pitch-yaw errormeasured by the autocollimator, the vertical and horizont straightness errors of the table are derived that they are maintained below 1.mu. m over 100mm stroke. The positioning accuracy of the linear motion is maintained below 2 .mu. m and the repeatability error is below 1 .mu. m

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.2
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• pp.810-818
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• 2021

A leakage current of ESS is classified mainly by the occurrence from a PCS(Power Conditioning System) section and an unbalanced grid current. The reason for the leakage current from the PCS section is a voltage change by IGBT (Insulated Gate Bipolar Transistor) switching and stray capacitance between the IGBT and heatsink. The leakage current caused by the grid unbalanced current flows to the ESS through the neutral line of grid-connected transformer for the ESS with a three limb iron type of Yg-wire connection. This paper proposes a mechanism for the occurrence of leakage current caused by stray capacitance, which is calculated using the heatsink formula, from the aspect of the PCS section and grid unbalance current. Based on the proposed mechanisms, this study presents the modeling of the leakage current occurrence using PSCAD/EMTDC S/W and evaluates the characteristics of leakage currents from the PCS section and grid unbalanced current. From the simulation result, the leakage current has a large influence on the battery side by confirming that the leakage current from the PCS is increased from 7[mA] to 34[mA], and the leakage current from an unbalanced load to battery housing is increased from 3.96[mA] to 10.76[mA] according to the resistance of the housings and the magnitude of the ground resistance.