• Journal of Power Electronics
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• 제19권1호
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• pp.307-315
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• 2019

Condition monitoring has been recognized as an effective and low-cost method to enhance the reliability and improve the maintainability of power electronic converters. In power electronic converters, high-frequency oscillation occurs during the switching transients of power transistors, which is known as ringing. The ringing frequency mainly depends on the values of the parasitic capacitance and stray inductance in the oscillation loop. Although circuit stray inductance is an important factor that leads to the ringing, it does not change with transistor aging. A shift in either the inside inductance or junction capacitance is an important failure precursor for power transistors. Therefore, ringing frequency can be used to monitor the health of power transistors. However, the switching actions of power transistors usually result in a dynamic behavior that can generate oscillation signals mixed with background noise, which makes it hard to directly extract the ringing frequency. A frequency extraction method based on empirical mode decomposition (EMD) and Fast Fourier transformation (FFT) is proposed in this paper. The proposed method is simple and has a high precision. Simulation results are given to verify the ringing analysis and experimental results are given to verify the effectiveness of the proposed method.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권2호
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• pp.72-78
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• 2001

A compact size high voltage pulse generator with nanosecond rise time has been designed and investigated experimentally. The inductance of a pulse generator can be reduced by fixing the Marx generator and pulse forming network components into a single cylindrical unit. As a result, nanosecond rise time about $8{\sim}10[ns]$ and pulse width of several hundred [ns] can be obtained from a modified Marx pulse generator. And parametric studies showed that the rise time of the output pulse was depended little on the change of the load resistance and the charging capacitance while, the pulse width of the output pulse was depended greatly upon the change of the load resistance and the charging capacitance. The theoretical showed the possibility to design the laboratory-size pulse generator very fast rising time and a proper pulse width by minimizing stray inductance and varying resistance and capacitance.

• 전기학회논문지
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• 제56권12호
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• pp.2166-2172
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• 2007

In this study a low-signal equivalent circuit based on the Double Schottky Barrier model is proposed for ZnO-based varistor. Since pin-lead inductance and stray capacitance are considered in pin-lead type ZnO varistor these inductance and capacitance could be removed from the experimental dielectric data of the varistor. According to the equivalent circuit simulation results the higher the varistor-voltage of varistor sample the capacitance of dielectric layer is larger, and the capacitances of semiconducting layer and depletion layer are smaller, while the parallel resistances of semiconducting layer and depletion layer are more larger values. Spectra of the dielectric loss factor $tan{\delta}$ show 2 peaks in low frequency and high frequency regions respectively. The low-frequency peak is due to the relaxation by deep donors and the high-frequency peak is due to the relaxation by shallow donors. Above results are well consistent with the theoretical mechanism of ZnO varistor.

• 조명전기설비학회논문지
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• 제17권6호
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• pp.83-88
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• 2003

본 논문에서는 IPM의 전기적인 기생 성분 중에서 성능에 가장 크게 영향을 미치는 밀러 커패시턴스에 의하여 발생하는 오동작을 시뮬레이션을 통하여 증명하고 이를 최소화하기 위한 방법을 제시한다. 게이트와 컬렉트 단자간에 형성되는 밀러 커패시턴스와 밀접하게 관련된 게이트-에미터 사이의 기생 커패시턴스와 게이트 저항과의 상관 관계를 PSpice 시뮬레이션을 통하여 분석한다. 또한 시뮬레이션 결과를 바탕으로 IPM의 오동작을 최소화하기 위한 보조 회로를 삽입한 주문형 IPM을 제시한다. 표준형 IPM과 오동작 방지를 위해 보조회로가 삽입된 주문형 IPM의 실험 파형을 통해서 주문형 IPM이 약 3 [V]의 오동작에 대한 여유 전압을 가짐을 확인할 수 있다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권1호
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• pp.30-35
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• 2000

The pulsed plasma wire-plate reactor was analyzed on the basis of experiment, EMTP simulation and modelling method. Though the reactor has a non-linear impedance characteristics, we demonstrate that the reactor impedance can be approximately analyzed with the measured initial capacitance and average resistive component of flat zone. Using this modelling method, the influence of the reactor capacitance on the impedance matching between pulse generator and reactor can be investigated. From this, we found that the energy of 95% was delivered form pulse generator to reactor at the ratio of $C_r/C_p\cong 0.3,\; where\; C_p\; is\; pulse\; generator\; capacitance, C_r$ is reactor capacitance.

• 전기학회논문지
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• 제65권1호
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• pp.88-96
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• 2016

In this paper, the GaN FET based phase-shift full-bridge dc-dc converter design is implemented. Switch characteristics of GaN FET were analyzed in detail by comparing state-of-the-art Si MOSFET. Owing to the low conduction resistance and parasitic capacitance, it is expected to GaN FET based power conversion system has improved performance. However, GaN FET is vulnerable to electric interference due to the relatively low threshold voltage and fast switching transient. Therefore, it is necessary to consider PCB layout to design GaN FET based power system because PCB layout is the main reason of stray inductance. To reduce the electric noise, gate voltage of GaN FET is analyzed according to operation mode of phase-shift full-bridge dc-dc converter. Two 600W phase-shifted full-bridge dc-dc converter are designed based on the result to evaluate effects of stray inductance.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 E
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• pp.2186-2188
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• 1999

A high frequency and energy density pulse transformer is a critical component of a high voltage power supply in a traveling wave tube (TWT) amplifier system. In this paper, processes of design, manufacturing, and test of the transformer are discussed. Primary voltage of the transformer is 240 V. The transformer secondary have two outputs which are 4100 V (Helix) and 2050 V (Collector). Total output power is 860 W. Normal operating frequency of the transformer is 10 kHz. In high energy density pulse transformers, temperature rise is a main problem during its operation. From our study, it was found that resonant current due to leakage inductance and stray capacitance was the main cause of temperature rise. This happens because of the inherently high turn-ratio in high voltage transformers. Solutions to reduce stray components are presented.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.519-520
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• 2008

교류에서의 전기저항값은 저항 elements 사이에서 나타나는 stray 전기용량과 elements의 길이에서 유도되는 인덕턴스의 영향으로 직류에서의 저항값과 차이를 보이게 된다. 이러한 직류와 교류에서의 저항값 차이가 대단히 작게 나면서 직류에서와 측정하는 교류에서의 저항값의 차이를 계산에 의해서 산출할 수 교류저항 표준기가 개발되었다. 개발된 교류저항표준기는 bi-filar 구조의 1 $k\Omega$로서, 1.6 kHz에서 직류/교류 저항값의 차이는 0.02 ${\mu}{\Omega}/{\Omega}$ 보다 작으며, 시정수는 1 kHz에서 $(8{\pm}2)\times10^{-10}$으로 측정되었다. 개발된 교류저항 표준기는 교류저항 국가표준에 최상급 표준기로 사용이 되어질 것이다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1995년도 추계학술대회 논문집
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• pp.466-469
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• 1995

This paper presents a design and performance of the 6 D.O.F linear motion table with a magnetic bearing suspension. The linear positioning of the table with a 150mm stroke is driven by a brushless DC Linear motor and the other attitudes of the stage are controlled by the analog PD controller with magnetic bearing actuators. Each magnetic bearing unit which consists of 3 electromagnets, 3 capacitance probes and 3 backup bearings affords controlled forces by detecting the air gap between the probes and guideways. An integral type capacitance probe amplifier is equipped on the upper plate of the table so that the probe line to the probe amplifier can be shorter therefore the problems due to the stray capacitance and noise can be reduced. Form the pitch-yaw errormeasured by the autocollimator, the vertical and horizont straightness errors of the table are derived that they are maintained below 1.mu. m over 100mm stroke. The positioning accuracy of the linear motion is maintained below 2 .mu. m and the repeatability error is below 1 .mu. m

• 한국산학기술학회논문지
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• 제22권2호
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• pp.810-818
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• 2021

ESS의 누설전류는 PCS(Power Control System)측 누설전류와 계통불평형 전류로 인한 누설전류로 구분되는데, PCS측의 누설전류는 정상 상태 운전 시, IGBT(Insulated Gate Bipolar Transistor) 스위칭의 전압 변화량과 IGBT와 방열판 사이에 존재하는 기생 커패시턴스에 의해 발생한다. 또한, 계통불평형 전류에 의한 누설전류는 불평형 부하로 인해 발생한 불평형 전류가 Yg-∆ 결선방식의 3각 철심이 적용된 태양광전원 연계형 변압기의 중성선을 통해 ESS로 유입된다. 따라서, 본 논문에서는 방열판 유도공식을 통해 산정한 기생 커패시턴스에 의하여 PCS측의 누설전류 발생 메커니즘을 제시하고 또한, 계통불평형에 의한 ESS측의 누설전류 발생 메커니즘을 제안한다. 이를 바탕으로, 배전계통 상용해석 프로그램인 PSCAD/EMTDC를 이용하여 배터리부, PCS부, AC전원부로 이루어진 PCS측의 누설전류 발생 메커니즘과 배전 계통부, 불평형 부하부, ESS부로 이루어진 계통불평형에 의한 ESS측의 누설전류 발생 메커니즘을 모델링하고, 누설전류의 특성을 평가한다. 상기의 모델링을 바탕으로 시뮬레이션을 수행한 결과, 외함의 저항과 접지저항의 크기에 따라 PCS측의 누설전류는 7[mA]에서 34[mA]로, 계통불평형에 의한 배터리 외함으로 흐르는 누설전류는 3.96[mA]에서 10.76[mA]로 증가하여 배터리측에 큰 영향을 미침을 알 수 있었다.