• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.52-53
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• 2012

This paper presents a new control scheme for a three-phase split DC-link capacitor inverter as an AC power supplies. The proposed control method can maintain the balanced sinusoidal output voltage under unbalanced and nonlinear load conditions. The validity of the control method has been verified by simulation results.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.9-11
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• 2018

본 논문은 넓은 영전압 스위칭 범위와 고효율을 가지는 Split-Capacitor Dual-Active-Bridge 컨버터를 제안한다. 제안한 컨버터는 기존의 Dual-Active-Bridge의 풀-브릿지 구조를 Split-Capacitor 구조로 변경하여 회로를 개선하였다. 비록 제안한 컨버터는 변압기 전류가 기존의 회로보다 2배만큼 높아지지만 6개 스위치의 정격 전압이 절반으로 줄어들며, 넓은 영전압 스위칭 범위를 가진다. 또한 변압기 전류의 증가로 인해, 기존의 컨버터에 비해 1/4만큼 작은 누설 인덕턴스로 같은 전력을 넘길 수 있다. 추가된 커패시터는 변압기 DC 성분에 의한 포화 문제를 막아주며 두 개의 출력을 가질 수 있도록 한다. 제안한 컨버터의 성능을 검증하기 위해 3-kW의 시제품을 제작하여 실험을 통해 증명하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.352-358
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• 2018

A split-capacitor (SC) dual-active-bridge (DAB) converter is proposed in this study. The DC-link capacitors of input and output are split in the proposed converter. The primary and secondary windings of transformer are connected to the midpoints of the DC-links. Hence, the SC DAB converter can inherently prevent transformer from saturation. Although the switch current stress of the proposed converter is twice that of the conventional DAB converter, the switch voltage stress is reduced by half. Therefore, the proposed converter can reduce switching loss and achieve high efficiency in a high switching frequency. Given the SC structure, the proposed converter can readily be connected to neutral-point-clamped- or half-bridge-type converters. The topology of the proposed converter is presented and the operating principle is analyzed in detail. A 3-kW hardware prototype was built and tested to verify the performance of the proposed converter.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1720-1728
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• 2018

This paper proposes a novel soft starting algorithm by using PWM inverter technique to control an amplitude of the motor starting current at a single-phase induction motor (SPIM). Traditional SPIM starting methods such as a Split-Phase, Capacitor-Start, Permanent-Split Capacitor (PSC), Capacitor-Start Capacitor-Run (CSCR), basically cannot control the magnitude of starting current due to the fixed system structures. Therefore, in this paper, a soft starting algorithm based on a proportional resonant (PR) control with a variable and constant frequency is proposed to reduce the inrush current and starting up time. In addition, a transition algorithm for operation modes is devised to generate a constant voltage and constant frequency (CVCF). The validity and effectiveness of the proposed soft starting method and transition algorithm are verified through experimental results.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1928-1938
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• 2016

The three-phase four-wire shunt active power filter (APF) is an effective method to solve the harmonic problem in three-phase four-wire power systems. In addition, it has two possible topologies, a four-leg inverter and a three-leg inverter with a split-capacitor. There are some studies investigating DC-link voltage control in three-phase four-wire APFs. However, when compared to the four-leg inverter topology, maintaining the balance between the DC-link upper and lower capacitor voltages becomes a unique problem in the three-leg inverter with a split-capacitor topology, and previous studies seldom pay attention to this fact. In this paper, the influence of the balance between the two DC-link voltages on the compensation performance, and the influence of the voltage balance controller on the compensation performance, are analyzed. To achieve the balance between the two DC-link capacitor voltages, and to avoid the adverse effect the voltage balance controller has on the APF compensation performance, a new DC-link voltage balance control strategy for the three-phase four-wire split-capacitor APF is proposed. Representative simulation and experimental results are presented to verify the analysis and the proposed DC-link voltage balance control strategy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.43-50
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• 2010

In this paper, we analyzed radiated emission generated by the split power/ground plane structures in order to reduce EMI in system modules. The magnetic fields and electric fields were simulated and measured on the test boards under various conditions. In order to reduce radiated emission, we have to determine spacing and location of the split ground gap so that input signal frequency does not coincide with the resonance frequency of the split power/ground plane structure and the phase of reflection coefficient is close to $0^{\circ}$ at input signal frequency. Moreover, we found that inserting a stitching capacitor could reduce the radiated emission. Low magnitude of reflection coefficient and the phase close to $0^{\circ}$ are required to reduce radiated emission. It is necessary to properly decide value and location of a stitching capacitor to fulfil those requirements.

• 전기의세계
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• v.31 no.2
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• pp.132-140
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• 1982

Designing the capacitor-run motor for balanced operation is accompanied with the excessive capacitor value and low capacitor terminal voltage of condenser. As a solution for this problems, It was reported the design by equal volt-ampere method. The running characteristics of capacitor-run motor by this method due to the balancing point selection, however, has a room to be studied further. This paper deals with the determination of the winding ratio and capacitor value of a permarient-split capacitor motor by balanced operation and equal volt-ampere method at the different load points. The analysis of the running characteristics of a motor and its designing method also presented for both cases. It concluded that the running characteristics due to the equal volt-ampere operation are very close to the balanced operation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1751-1758
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• 2003

This paper describes speed control of a permanent split capacitor single phase induction motor using SHE PWM inverters. The inverter is controlled by V55 microprocessor and its range is larger than other systems. Due to the V/F control with SHE(Selected Harmonic Elimination) PWM, continuously variable speed is attained and THD(Total Harmonic Distortion) is decreased. This is verified by simulations and experimental results.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.884-885
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• 2007

This paper presents an window based user-friendly designed characteristics analysis program of permanent-split capacitor single-phase induction motor. For the analysis, equivalent magnetic circuit and symmetrical coordinate method are used. The saturation effect and iron loss of stator and rotor core are considered. The analysis program is made to GUI type which can be used easily by many elementary designer. The accuracy of analysis is verified by comparison with experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.108-113
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• 2013

This paper describes a low power asynchronous successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for biomedical applications in a 0.35 ${\mu}m$ CMOS technology. The digital-to-analog converter (DAC) uses a capacitive split-arrays consisting of 6-b main array, an attenuation capacitor C and a 5-b sub array for low power consumption and small die area. Moreover, splitting the MSB capacitor into sub-capacitors and an asynchronous SAR reduce power consumption. The measurement results show that the proposed ADC achieved the SNDR of 68.32 dB, the SFDR of 79 dB, and the ENOB (effective number of bits) of 11.05 bits. The measured INL and DNL were 1.9LSB and 1.5LSB, respectively. The power consumption including all the digital circuits is 6.7 ${\mu}W$ at the sampling frequency of 100 KHz under 3.3 V supply voltage and the FoM (figure of merit) is 49 fJ/conversion-step.