• 제목/요약/키워드: Spiral Inductor

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Spiral Inductor Design for Quality Factor

  • Lee, Sang-Gug;Kim, Sin-Cheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권1호
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    • pp.56-58
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    • 2002
  • A closed form expression for the quality factor of the spiral inductor, methodologically, is presented as a function of the inductance ($L_{ind}$), metal-line width (W), spacing (S), inner and the diameter ($D_i$). For a given inductance, the dependences of quality factor on W, S, and $D_i$ are analyzed, and suggested the design optimization guidelines.

A Simple Model Parameter Extraction Methodology for an On-Chip Spiral Inductor

  • Oh, Nam-Jin;Lee, Sang-Gug
    • ETRI Journal
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    • 제28권1호
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    • pp.115-118
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    • 2006
  • In this letter, a simple model parameter extraction methodology for an on-chip spiral inductor is proposed based on a wide-band inductor model that incorporates parallel inductance and resistance to model skin and proximity effects, and capacitance to model the decrease in series resistance above the frequency near the peak quality factor. The wide-band inductor model does not require any frequency dependent elements, and model parameters can be extracted directly from the measured data with some curve fitting. The validity of the proposed model and parameter extraction methodology are verified with various size inductors fabricated using $0.18\;{\mu}m$ CMOS technology.

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On-chip Inductor Modeling in Digital CMOS technology and Dual Band RF Receiver Design using Modeled Inductor

  • Han Dong Ok;Choi Seung Chul;Lim Ji Hoon;Choo Sung Joong;Shin Sang Chul;Lee Jun Jae;Shim SunIl;Park Jung Ho
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 학술대회지
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    • pp.796-800
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    • 2004
  • The main research on this paper is to model on-chip inductor in digital CMOS technology by using the foundry parameters and the physical structure. The s-parameters of a spiral inductor are extracted from the modeled equivalent circuit and then compared to the results obtained from HFSS. The structure and material of the inductor used for modeling in this work is identical with those of the inductor fabricated by CMOS process. To show why the modeled inductor instead of ideal inductor should be used to design a RF system, we designed dual band RF front-end receiver and then compared the results between when using the ideal inductor and using the modeled inductor.

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실리콘 기판 위의 나선형 인덕터에 대한 SPICE 모델 (SPICE Model of the Spiral Inductor on Silicon Substrate)

  • 김영석;박종욱;김남수;유현규
    • 대한전자공학회논문지SD
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    • 제37권10호
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    • pp.11-16
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    • 2000
  • 회로설계 엔지니어들이 쉽게 RF IC 설계에 사용할 수 있는 나선형 인덕터의 SPICE 모델을 개발하였다. 이 모델은 나선형 인덕터의 등가회로 소자 값들을 SPICE의 user-defined function 및 subcircuit 기능을 이용하여, 레이아웃 변수, 공정 변수, 실리콘 기판 변수로부터 정의하였다. 특히 인덕턴스는 임의의 회전에 대한 인덕턴스 Li 및 임의의 두 회전에 대한 상호 인덕턴스 Mij를 subcircuit으로 정의하여 전체 인덕턴스 값을 계산하였다. 모델의 정확성을 검증하기 위하여 CMOS 0.8${\mu}m$ 공정으로 제작된 나선형 인덕터의 측정 s-파라미터, 총 인덕턴스 및 quality-factor 결과를 시뮬레이션 데이터와 비교한 결과 일치함을 확인하였다. 본 논문에서 제시된 SPICE를 이용한 나선형 인덕턴스 모델은 scalable하며, 실리콘 기판의 영향등을 포함하기 때문에 레이아웃 최적화에 쉽게 사용할 수 있는 장점을 가진다.

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LTCC기술을 이용한 마이크로 인덕터에 관한 연구 (A study on the micro inductor using LTCC technology)

  • 최동찬;김찬영;김희준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.289-291
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    • 2003
  • This paper deals with the design of a spiral micro inductor using LTCC(Low Temperature Cofired Ceramics) technology. The inductors using the LTCC technology have some prominent properties of high integration of circuits, high confidence and low cost comparing with previously fabricated thick-film inductors. In this paper, we designed a new spiral-type micro inductor comprising a magnetic material to improve the inductance and leakage flux. we, in addition, presented the simulation results for various shapes of the magnetic material in the micro inductor, Finally application of the micro inductor to the boost DC-DC converter is investigated.

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Parallel-Branch Spiral Inductors with Enhanced Quality Factor and Resonance Frequency

  • Bae, Hyun-Cheol;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • 제8권2호
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    • pp.47-51
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    • 2008
  • In this paper, we present a cost effective parallel-branch spiral inductor with the enhanced quality factor and the resonance frequency. This structure is designed to improve the quality factor, but different from other fully stacked spiral inductors. The parallel-branch effect is increased by overlapping the first metal below the second metal with same direction. Measurement result shows an increased quality factor of 12 % improvement. Also, we show an octagonal parallel-branch inductor which reduces the parasitic capacitances for higher frequency applications.

다구찌 실험 계획법을 이용한 나선형 인덕터의 패턴드 그라운드 쉴드 최적 설계 연구 (Optimization of 'Patterned Ground Shield' of Spiral Inductor using Taguchi's Method)

  • 고재형;오상배;김동훈;김형석
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2007년도 학술대회
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    • pp.436-439
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    • 2007
  • This paper describes the optimization of PGS(Patterned Ground Shield) of 5.5 turns rectangular spiral inductor using Taguchi's method. PGS is decrease method of parasite component by silicon substrate among dielectric loss reduction method. By using the taguchi's method, each parameter is fixed upon that PGS high poison(A), slot spacing(B), strip width(C) and overlap turn number(D) of PGS design parameter. Then we verified that percentage contribution and design sensitivity analysis of each parameter and level by signal to noise ratio of larger-the-better type. We consider percentage contribution and design sensitivity of each parameter and level, and then verify that model of optimization for PGS is lower inductance decreasing ratio and higher Q-factor increasing ratio by EM simulation.

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최적화된 나선형 인덕터를 이용한 이동 통신용 저잡음. 저전력 2㎓ CMOS VCO 설계에 관한 연구 (A 2㎓, Low Noise, Low Power CMOS Voltage-Controlled Oscillator Using an Optimized Spiral Inductor for Wireless Communications)

  • 조제광;이건상;이재신;김석기
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.283-286
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    • 1999
  • A 2㎓, low noise, low power CMOS voltage-controlled oscillator (VCO) with an integrated LC resonator is presented. The design of VCO relies heavily on the on-chip spiral inductor. An optimized spiral inductor with Q-factor of nearly 8 is achieved and used for the VCO. The simulated result of phase noise is as low as -l14 ㏈c/Hz at an offset frequency of a 600KHz from a 2㎓ carrier frequency. The VCO is tuned with standard available junction capacitors, resulting in an about 400MHz tuning range (20%). Implemented in a five-metal 0.25${\mu}{\textrm}{m}$ standard CMOS process, the VCO consumes only 2㎽ from a single 2.5V supply. It occupies an active area of 620${\mu}{\textrm}{m}$$\times$720${\mu}{\textrm}{m}$.

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병렬분기 방법을 이용한 박막 나선 인덕터의 Q 인자 향상 (Enhancement of Q Factor in Parallel-Branch Spiral Inductors)

  • 서동우;민봉기;강진영;백문철
    • 한국전기전자재료학회논문지
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    • 제16권1호
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    • pp.83-87
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    • 2003
  • In the present paper we suggested a parallel branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on p-type silicon wafer (5∼15Ω-cm) under the standard CMOS process and it showed a enhanced qualify(Q) factor by more than 10 % with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with conventional spital inductors

High-Q MEMS Spiral Inductor를 이용한 RF VCO (RF VCO with High-Q MEMS-based Spiral Inductor)

  • 김태호;김경만;서희원;황인석;김삼동
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.987-990
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    • 2003
  • This paper presents a cross-coupled RF VCO with high-Q MEMS-based spiral inductors. Since the use of high-Q inductors is critical to VCO design, MEMS-based spiral inductors with the Q-factor of nearly 22 are used for the RF VCO with an active cascode current source. The RF VCO circuits including spiral inductors have been designed and simulated in GaAs MMIC-MEMS process. The simulation results of the VCO circuits showed the phase noise of -180dBc/Hz at an offset frequency of 500KHz. The RF VCO circuit simulatinon used 2mA DC current and 3.3V supply.

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