• Title/Summary/Keyword: Speed bump

Search Result 90, Processing Time 0.029 seconds

A Study on the Structural Stiffness and Coulomb Damping of Air Foil Bearing Considering the Interaction among Bumps (범프들의 상호작용을 고려한 공기 포일 베어링의 구조적 강성 및 쿨롱 감쇠에 대한 연구)

  • Lee, Yong-Bok;Park, Dong-Jin;Kim, Chang-Ho
    • Tribology and Lubricants
    • /
    • v.22 no.5
    • /
    • pp.252-259
    • /
    • 2006
  • Air foil bearing supports the rotating journal using hydrodynamic force generated at thin air film. The bearing performances, stiffness, damping coefficient and load capacity, depend on the rotating speed and the performance of the elastic foundation, bump foil. The main focus of this study is to decide the dynamic performance of corrugated bump foil, structural stiffness and Coulomb damping caused by friction between bump foil and top foil/bump foil and housing. Structural stiffness is determined by the bump shape (bump height, pitch and bump thickness), dry-friction, and interacting force filed up to fixed end. So, the change of the characteristics was considered as the parameters change. The air foil bearing specification for analysis follows the general size; diameter 38.1 mm and length 38.1 mm (L/D=1.0). The results show that the stiffness at the fixed end is more than the stiffness at the free end, Coulomb damping is more at the fixed end due to the small displacement, and two dynamic characteristics are dependent on each other.

A Study on the Structural Stiffness and Coulomb Damping of Air Foil Bearing Considering the Interaction among Bumps (범프들의 상호작용을 고려한 공기 포일 베어링의 구조적 강성 및 쿨롱 감쇠에 대한 연구)

  • Park, Dong-Jin;Kim, Chang-Ho;Lee, Sung-Chul;Lee, Yong-Bok
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
    • /
    • 2006.05a
    • /
    • pp.1135-1141
    • /
    • 2006
  • Air foil bearing supports the rotating journal using hydrodynamic force generated at thin air film. The bearing performance, stiffness, damping coefficient and load capacity, depends on the rotating speed and the performance of the elastic foundation, bump foil. The main focus of this study is to decide the dynamic performance of corrugated bump foil, structural stiffness and Coulomb damping caused by friction between bump foil and top foil/bump foil and housing. Structural stiffness is determined by the bump shape (bump height, pitch and bump thickness), dry-friction, and interacting force filed up to fixed end. So, the change of the characteristics was considered as the parameters change. The air foil bearing specification for analysis follows the general size; diameter 38.1 mm and length 38.1mm (L/D=1.0). The results show that the stiffness at the fixed end is more than the stiffness at the free end, Coulomb damping is more at the fixed end due to the small displacement, and two dynamic characteristics are dependent on each other.

  • PDF

An Accurate Boundary Detection Algorithm for Faulty Inspection of Bump on Chips (반도체 칩의 범프 불량 검사를 위한 정확한 경계 검출 알고리즘)

  • Joo, Ki-See
    • Proceedings of KOSOMES biannual meeting
    • /
    • 2005.11a
    • /
    • pp.197-202
    • /
    • 2005
  • Generally, a semiconductor chip measured with a few micro units is captured by line scan camera for higher inspection accuracy. However, the faulty inspection requires an exact boundary detection algorithm because it is very sensitive to scan speed and lighting conditions. In this paper we propose boundary detection using subpixel edge detection method in order to increase the accuracy of bump faulty detection on chips. The bump edge is detected by first derivative to four directions from bump center point and the exact edge positions are searched by the subpixel method. Also, the exact bump boundary to calculate the actual bump size is computed by LSM(Least Squares Method) to minimize errors since the bump size is varied such as bump protrusion, bump bridge, and bump discoloration. Experimental results exhibit that the proposed algorithm shows large improvement comparable to the other conventional boundary detection algorithms.

  • PDF

Accurate Boundary detection Algorithm for The Faulty Inspection of Bump On Chip (반도체 칩의 범프 불량 검사를 위한 정확한 경계 검출 알고리즘)

  • Kim, Eun-Seok
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.11 no.4
    • /
    • pp.793-799
    • /
    • 2007
  • Generally, a semiconductor chip measured with a few micro units is captured by line scan camera for higher inspection accuracy. However, the faulty inspection requires an exact boundary detection algorithm, because it is very sensitive to scan speed and lighting conditions. In this paper we propose boundary detection with subpixel edge detection in order to increase the accuracy of bump faulty detection on chips. The bump edge is detected by first derivative to four directions from bump center point and the exact edge positions are searched by the subpixel method. Also, the exact bump boundary to calculate the actual bump size is computed by LSM(Least Squares Method) to minimize errors since the bump size is varied such as bump protrusion, bump bridge, and bump discoloration. Experimental results exhibit that the proposed algorithm shows large improvement comparable to the other conventional boundary detection algorithms.

A High-Speed White-Light Scanning Interferometer for Bump Inspection of Semiconductor Manufacture (반도체 Bump 검사를 위한 백색광 주사 간섭계의 고속화)

  • Ko, Kuk Won;Sim, Jae Hwan;Kim, Min Young
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.30 no.7
    • /
    • pp.702-708
    • /
    • 2013
  • The white-light scanning interferometer (WSI) is an effective optical measurement system for high-precision industries (e.g., flat-panel display and electronics packaging manufacturers) and semiconductor manufacturing industries. Its major disadvantages include a slow image-capturing speed for interferogram acquisition and a high computational cost for peak-detection on the acquired interferogram. Here, a WSI system is proposed for the semiconductor inspection process. The new imaging acquisition technique uses an 'on-the-fly' imaging system. During the vertical scanning motion of the WSI, interference fringe images are sequentially acquired at a series of pre-defined lens positions, without conventional stepwise motions. To reduce the calculation time, a parallel computing method is used to link multiple personal computers (PCs). Experiments were performed to evaluate the proposed high-speed WSI system.

Effect of Shearing Speed on High Speed Shear Properties of Sn1.0Ag0.5Cu Solder Bump on Various UBM's (다양한 UBM층상의 Sn0Ag0.5Cu 솔더 범프의 고속 전단특성에 미치는 전단속도의 영향)

  • Lee, Wang-Gu;Jung, Jae Pil
    • Korean Journal of Metals and Materials
    • /
    • v.49 no.3
    • /
    • pp.237-242
    • /
    • 2011
  • The effect of shearing speed on the shear force and energy of Sn-0Ag-0.5Cu solder ball was investigated. Various UBM (under bump metallurgy)'s on Cu pads were used such as ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold; Ni/Pd/Au), ENIG (Electroless Nickel, Immersion Gold; Ni/Au), OSP (Organic Solderability Preservative). To fabricate a shear test specimen, a solder ball, $300{\mu}m$ in diameter, was soldered on a pad of FR4 PCB (printed circuit board) by a reflow soldering machine at $245^{\circ}C$. The solder bump on the PCB was shear tested by changing the shearing speed from 0.01 m/s to 3.0 m/s. As experimental results, the shear force increased with a shearing speed of up to 0.6 m/s for the ENIG and the OSP pads, and up to 0 m/s for the ENEPIG pad. The shear energy increased with a shearing speed up to 0.3 m/s for the ENIG and the OSP pads, and up to 0.6 m/s for the ENEPIG pad. With a high shear speed of over 0 m/s, the ENEPIG showed a higher shear force and energy than those of the ENIG and OSP. The fracture surfaces of the shear tested specimens were analyzed, and the fracture modes were found to have closer relationship with the shear energy than the shear force.

Development of Convergence LED Streetlight and Speed Bump Using Solar Cell and Piezoelectric Element (태양광과 압전소자를 이용한 융복합 LED 발광 과속방지턱 겸용 가로등 개발)

  • Nahm, Eui-Seok;Cho, Han-Jin
    • Journal of Digital Convergence
    • /
    • v.14 no.5
    • /
    • pp.325-331
    • /
    • 2016
  • In driving at evening or night, we are not able to recognize the speed bump and so stop suddenly. It could result in accidents. And also, we have a restriction of street light installation in farm road because it could be harmful to the crops and driver could not recognize the walking people. It needs to develop the speed bump with light and streetlight to be non harmful to the crops. So, we develop both the speed bump and streetlight with LED which could be non harmful to the crops and be increased recognition of walking people in farm road. For LED lighting power, we use the solar cells, and piezoelectric elements. It has automatic on/off according to power saving rates without illumination sensor. Minimization of circuit elements and design of minimum resisters and low power LED was used for power saving in assuring 3-days.

A Flip Chip Packaged 40 Gb/s InP HBT Transimpedance Amplifier (플립칩 패키지된 40Gb/s InP HBT 전치증폭기)

  • Ju, Chul-Won;Lee, Jong-Min;Kim, Seong-Il;Min, Byoung-Gue;Lee, Kyung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2007.06a
    • /
    • pp.183-184
    • /
    • 2007
  • A 40 Gb/s transimpedance amplifier IC was designed and fabricated with a InP/InGaAs HBTs technology. In this study, we interconnect 40Gbps trans impedance amplifier IC to a duroid substrate by a flip chip bonding instead of conventional wire bonding for interconnection. For flip chip bonding, we developed fine pitch bump with the $70{\mu}m$ diameter and $150{\mu}m$ pitch using WLP process. To study the effect of WLP, electrical performance was measured and analyzed in wafer and package module using WLP. The Small signal gains in wafer and package module were 7.24 dB and 6.93dB respectively. The difference of small signal gain in wafer and package module was 0.3dB. This small difference of gain is due to the short interconnection length by bump. The characteristics of return loss was under -10dB in both wafer and module. So, WLP process can be used for millimeter wave GaAs MMIC with the fine pitch pad and duroid substrate can be used in flip chip bonding process.

  • PDF

Aging Characteristic of Intermetallic Compounds and Bonding Strength of Flip-Chip Solder Bump (플립 칩 솔더 범프의 접합강도와 금속간 화합물의 시효처리 특성)

  • 김경섭;장의구;선용빈
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.9 no.1
    • /
    • pp.35-41
    • /
    • 2002
  • Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of micro-electronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder bump and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6/Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

  • PDF