• KIEE International Transactions on Electrophysics and Applications
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• 제3C권1호
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• pp.10-14
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• 2003

The occurrence of partial discharge (PD) in solid dielectrics is very harmful because it leads to the deterioration of insulation by electrical, chemical, and thermal reactions as a combined action of the discharged ions bombarding the surface and by the action of chemical compounds that are formed by the discharge. Consequently, if any defects are present in the solid insulation system, performance decreases until the system breaks down. Therefore, removing or suppressing the defect is very important. Voids are a typical defect in the solid insulation system and are very harmful because they deteriorate insulation. As a basic step, studying the properties of PD in voids is important because an accurate knowledge of these properties is required to estimate the deterioration of voids. In this paper, the correlation between the size of voids and internal PD is discussed as a function of the time of the applied voltage and its magnitude. Magnitude, repetition rate, average discharge power, and average discharge current of PD in specimens with large voids were found to be larger than the others in this experiment. The smaller specimens had voids when the magnitude and number of PDs were reduced.

• 한국추진공학회:학술대회논문집
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• 한국추진공학회 2017년도 제48회 춘계학술대회논문집
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• pp.521-528
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• 2017

본 논문에서는 고체 로켓 추진기관에서 내열재 및 단열재로 사용되는 실리카/페놀릭 복합재료의 열 반응을 고려한 열전도 수치해석을 수행하였다. 고체 로켓 추진기관의 연소 중 실리카/페놀릭의 삭마와 열분해 과정을 고려한 열전도 해석을 위해 1차원 유한차분법을 이용하여 계산을 수행하였다. 노즐벽에서의 경계조건은 대류열전달계수를 고려하였으며, 이는 적분방정식을 이용하여 계산하였다. 삭마두께 및 숯깊이 해석결과는 목삽입재 평가 모터인 TPEM-10을 이용한 시험결과와 비교분석하였으며, 잘 일치하는 것을 확인할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.353-353
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• 2010

본 논문에서는 소스와 드레인의 형성에 있어서 implantation 이 아닌 silicide를 형성시켜서 최고온도 $500^{\circ}C$가 넘지않는 저온공정을 실현하였고, silicon-on-insulator (SOI) 기판이 아닌 solid phase crystallization (SPC) 결정화 방법을 이용하여 결정화 시킨 SPC-TFT 기판을 사용하였다. Silicide 의 형성은 pt를 증착하여 furnace에서 열처리를 실시하여 형성하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 추계학술대회 논문집
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• pp.85-88
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• 1998

Light-emitting diode(LEDs), diode arrays, and phosphor display panels are finding increased use in a variety of commercial applications. Present and anticipated application of these devices include solid state indicator(e.g., digital clocks, meter readout) and display systems(e.g., instrument panels, TV display), the application being determined by the light -output capability and size availability(cost) of the particular device. In this work, Phosphor based on ZnS:Cu are used. Relation by luminance with the thickness of insulating layer and phosphor layer are discussed. Increased thickness of insulating layer are stable on voltage to 300V. By considering thickness and voltage, optimal structure and thickness are investigated. Also in order to maximize even surface emission, various sieving process are introduced. Very similar phosphor particle size is selected. Luminance by various wave intensity is also investigated. 150cd/m$^2$ luminance are investigated in stable voltage and frequency.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.60-61
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• 2007

In this paper, the p-channel poly Si thin-film transistors (Poly-Si TFT's) using formed by solid phase crystallization (SPC) on glass substrate were fabricated. And we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's to indicate non-volatile memory (NVM) effect. Poly-Si TFT is investigated by measuring the electrical properties of poly-Si films, such as I-V characteristics, on/off current ratio. NVM characteristics is showed by measuring the threshold voltage change of TFT through I-V characteristics.

• 한국추진공학회:학술대회논문집
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• 한국추진공학회 2010년도 제35회 추계학술대회논문집
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• pp.257-260
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• 2010

고체 추진기관 연소관 내열재의 숯 및 삭마 두께를 예측하기 위한 방법을 제시하였다. 내열재 두께를 계산하기 위해서는 열 및 구조 경계조건을 정확히 알아야 한다. 제안된 방법은 연소관에서 복사, 대류 및 $Al_2O_3$ 조건에서 내열 고무의 열분해 현상을 규명하는데 매우 유용하다. 간단하고 빠르게 고무계 내열재를 초기에 설계하기 위하여 단순화된 수식 과 실험이 사용되었다. 연소관 후방 돔 부위의 숯 및 삭마 두께를 예측하는데 이용이 가능하며 실제 연소 시험을 통하여 적용 가능성을 확인하였다.

• 전기학회논문지
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• 제61권7호
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• pp.992-997
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• 2012

In this paper, we were analyzed the vibration characteristics of the three-phase cast resin transformer using less than 50% of load in the field. Most of the cast resin transformer is less than 50% in the domestic field is used for load conditions. Consisting of a solid insulator cast resin transformer is generating lots of noise and vibration. In addition, because it is affected by Joule 's heat is used in light load conditions. As a results, the transformer vibrations at frequencies below about from 200Hz to 500Hz were detected. Vibration velocity depends on the load variations were found. Load up to approximately 20-30% in most cases the vibration velocity was found at 4,000 ${\mu}m/s$ or less, 8,000 ${\mu}m/s$ or more. Vibration frequency at light load conditions were generated at the 120Hz, 240Hz, 360Hz and 480Hz. At the load condition of from 10% to 20%, vibration velocity is higher than another. Most of the vibration velocity were identified at the 1,000 ${\mu}m/s$ or less. Using the vibration frequency and velocity measurements data, the load on the cast resin transformer analyzed the correlation of the burden. Therefore, this data could be found in the vibration characteristics of the light-load conditions. If the field measurements using the data perform diagnostics on the transformer, it's expected to be very effective.

• 한국추진공학회:학술대회논문집
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• 한국추진공학회 2017년도 제48회 춘계학술대회논문집
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• pp.1045-1047
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• 2017

본 연구는 고체 추진기관에 적용되는 내열재를 기존의 autoclave 공법이 아닌 hot press molding을 포함한 B/D 성형공법으로 제작하는데 초점을 두고 있다. EPDM/kevlar를 기본 조성으로 내열재 원료가 구성된다. 우선 부츠 내열재는 금형을 사용하여 가황 상태로 제작한다. 연소관에 일체형 내열재로 성형하기 위하여 두 개의 내열재 사이에 테이프를 삽입하였고, bladder를 사용하여 압력과 온도를 상승시켜 제작하였다.

• 한국추진공학회지
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• 제27권1호
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• pp.9-16
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• 2023

본 연구에서는 고체추진기관 내 연소관단열재의 열분해와 삭마를 고려하여 단열재의 열응답을 예측할 수 있는 일차원 해석기법을 개발하였다. 모델링에는 연소관단열재 내부에서 발생하는 열분해로 인한 물성변화, 숯층의 팽창 및 분해가스 이동을 고려하였다. 또한 연소가스로부터의 복사/대류 열유속을 경계조건으로 적용하였으며 단열재 표면에서 발생하는 화학적 삭마속도를 대수식으로 모델링하였다. 해석기법 검증을 위해 열전대가 설치된 시험모터에 대한 해석을 수행하였다. 해석으로 도출된 온도분포는 시험과 유사한 값을 나타냈으며 시험과 예측 열파괴두께의 오차는 0.1 mm 내외였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.343-344
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• 2012

It has been known since the mid 1960s that Ag can be photodissolved in chalcogenide glasses to form materials with interesting technological properties. In the 40 years since, this effect has been used in diverse applications such as the fabrication of relief images in optical elements, micro photolithographic schemes, and for direct imaging by photoinduced Ag surface deposition. ReRAM, also known as conductive bridging RAM (CBRAM), is a resistive switching memory based on non-volatile formation and dissolution of a conductive filament in a solid electrolyte. Especially, Ag-doped chalcogenide glasses and thin films have become attractive materials for fundamental research of their structure, properties, and preparation. Ag-doped chalcogenide glasses have been used in the formation of solid electrolyte which is the active medium in ReRAM devices. In this paper, we investigated the nature of thin films formed by the photo-dissolution of Ag into Ge-Se glasses for use in ReRAM devices. These devices rely on ion transport in the film so produced to create electrically programmable resistance states. [1-3] We have demonstrated functionalities of Ag doped chalcogenide glasses based on their capabilities as solid electrolytes. Formation of such amorphous systems by the introduction of Ag+ ions photo-induced diffusion in thin chalcogenide films is considered. The influence of Ag+ ions is regarded in terms of diffusion kinetics and Ag saturation is related to the composition of the hosting material. Saturated Ag+ ions have been used in the formation of conductive filaments at the solid electrolyte which is the active medium in ReRAM devices. Following fabrication, the cell displays a metal-insulator-metal structure. We measured the I-V characteristics of a cell, similar results were obtained with different via sizes, due to the filamentary nature of resistance switching in ReRAM cell. As the voltage is swept from 0 V to a positive top electrode voltage, the device switches from a high resistive to a low resistive, or set. The low conducting, or reset, state can be restored by means of a negative voltage sweep where the switch-off of the device usually occurs.