• Proceedings of the KWS Conference
• /
• 2006.05a
• /
• pp.21-23
• /
• 2006

The microstructural investigation and thermo-mechanical reliability evaluation of the Sn-3.0Ag-0.5Cu solder bumped flip chip package were carried out during the thermal shock test of the package. In the initial reaction, the reaction product between the solder and Cu mini bump of chip side was Cu6Sn5 layer, while the two phases which were (Cu,Ni)6Sn5 and (Ni,Cu)3Sn4 were formed between the solder and Ni-P layer of the package side. The cracks were occurred at the corner solder joints after the thermal shocks of 400 cycles. The primary failure mechanism of the solder joints in this type of package was confirmed to be thermally activated solder fatigue failure.

• Journal of the Microelectronics and Packaging Society
• /
• v.18 no.4
• /
• pp.85-90
• /
• 2011

With regard to reliability of solder joint, the significant failures include open defects that occurs from alignment problem, Head in Pillow by PCB's warpage, the crack of solder by CTE mismatch, and the crack of IMC layer by mechanical impact. Especially as PCB down-sizing and surface finish is under progress, brittle failure of IMC layer between solder bump and PCB pad becomes a big issue. Therefore, it requires enhancing the level of difficulty in the existing assessment method and improving the measurement through the study on the mechanism of IMC formation, growth and brittle failure. Under this circumstance, this study is intended to suggest the direction of research for improving the reliability on the crack such as improvement of IMC brittle fracture.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.323-327
• /
• 2004

The bubble flow from the wafer surface during plating process was studied in this paper. The plating shape in the opening of photoresist becomes gradated shape in the fountain plating system, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. So, we designed the tilted electrode ring contact to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and ${\alpha}-step$. In ${\alpha}-step$ measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were ${\pm}16.6%,\;{\pm}4%$ respectively.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.2211_2212
• /
• 2009

본 논문에서는 GaAs-Transistor가 접합된 전송선로 사이에서 발생되는 Crosstalk의 영향에 관한 연구를 하였다. 이 모델의 해석을 위해 인접선에서의 Crosstalk의 이론적인 접근을 하고, 3D Full Wave 시뮬레이션과 Circuit 시뮬레이션을 통해 해석하는 Crosstalk의 해석방법에 대한 모델을 제시하고자 한다. 또한 Coupling 된 Solder Bump의 Equivalent Circuit Model을 제시함으로써 Solder Bump의 Coupling이 Crosstalk의 영향에 미치는 영향에 대해 규명하고자 한다.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2003.11a
• /
• pp.72-75
• /
• 2003

솔더의 상호확산을 이용한 저온 칩 접합을 구현하기 위하여 $117^{\circ}C$의 공정 온도를 가지는 In과 Sn 솔더패드를 $25\;mm^2$의 접합면적에 형성하고 두 솔더의 융점 보다 낮은 온도인 $120^{\circ}C$에서 접합을 시행하였다. 30초의 반응시간에서도 접합이 이루어 졌으며 반응시간이 지남에 따라 두 솔더가 반응하여 혼합상을 형성하였다. 솔더패드 접합에서 접합부는 낮은 접속저항과 높은 접속강도를 가짐을 확인할 수 있었다. $40\;{\mu}m$의 극미세피치의 In, Sn 솔더 범프를 형성하여 접합부를 형성하였으며 daisy chain을 형성한 접합부를 이용하여 평균 $65\;m\Omega/bump$ 저항값을 얻을 수 있었다. 상온에서 시효후 $54\%$의 접속저항이 감소함을 확인할 수 있었다.

• Proceedings of the KWS Conference
• /
• 2003.05a
• /
• pp.224-227
• /
• 2003

The longitudinal thermosonic bonding method is investigated in this work for its application to the soldering process for electronic packaging. The effect of the ultrasonic is analyzed through lumped modeling, and the material properties of a viscoelastic model are measured experimentally. The thermosonic bonding method is verified by inserting the Cu pin and Au bump into solder block. As the solder thickness decreases, temperature of the solder is calculated to increase rapidly because of larger strain. Localized heating due to ultrasonic vibration is observed to melt the solder near the pin, which is adequate to the high density electronic package and Pb-free solder having high melting temperature.

• Journal of the Microelectronics and Packaging Society
• /
• v.19 no.1
• /
• pp.17-24
• /
• 2012

Recently, flip chip interconnection has been increasingly used in microelectronic assemblies. The common Flip chip interconnection is formed by reflow of the solder bumps. Lead-Tin solders and Tin-based solders are most widely used for the solder bump materials. However, the flip chip interconnection using these solder materials cannot be applied to temperature-sensitive components since solder reflow is performed at relatively high temperature. Therefore the development of low temperature bonding technologies is required in these applications. A few bonding techniques at low temperature of $150^{\circ}C$ or below have been reported. They include the reflow soldering using low melting point solder bumps, the transient liquid phase bonding by inter-diffusion between two solders, and the bonding using low temperature curable adhesive. This paper reviews various low temperature bonding methods.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2008.11a
• /
• pp.265-266
• /
• 2008

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2004.11a
• /
• pp.54-54
• /
• 2004

• Proceedings of the KWS Conference
• /
• 2006.05a
• /
• pp.18-20
• /
• 2006