• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.5
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• pp.349-357
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• 2022

Since the flight control computer of unmanned aerial vehicle (UAV) is a flight critical equipment, it is necessary to ensure reliability and safety from the development step, and a redundancy-based fault management design is required in order to operate normally even a failure occurs. To reduce cost, weight and power consumption, the dual-redundant flight control system design is considered in UAV. However, there are various restrictions on the fault management design. In this paper, we propose the fault detection and isolation designs for the dual-redundant flight control computer to satisfy the safety requirements of an UAV. In addition, the flight control computer developed by applying the fault management design performed functional tests in the integrated test environment, and after performing FMET in the HILS, its reliability was verified through flight tests.

• Nuclear Engineering and Technology
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• v.55 no.9
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• pp.3133-3139
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• 2023

Neutron imaging technology as a means of non-destructive detection of materials is complementary to X-ray imaging. Silicon photomultiplier (SiPM), a new type of optical readout device, has overcome some shortcomings of traditional photomultiplier tube (PMT), such as high-power consumption, large volume, high price, uneven gain response, and inability to work in strong magnetic fields. Its application in the field of neutron detection will be an irresistible general trend. In this paper, a thermal neutron imaging detector based on ⁶LiF/ZnS scintillation screen and SiPM array readout was developed. The design of the detector geometry was optimized by geant4 Monte Carlo simulation software. The optimized detector was evaluated with a step wedge sample. The results show that the detector prototype with a 48 mm × 48 mm sensitive area can achieve about 38% detection efficiency and 0.26 mm position resolution when using a 300 ㎛ thick ⁶LiF/ZnS scintillation screen and a 2 mm thick Bk7 optical guide coupled with SiPM array, and has good neutron imaging capability. It provides effective data support for developing high-performance imaging detectors applied to the China Spallation Neutron Source (CSNS).

• Journal of Information Science Theory and Practice
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• v.10 no.spc
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• pp.56-65
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• 2022

Korea Institute of Science and Technology Information (KISTI) is a Worldwide LHC Computing Grid (WLCG) Tier-1 center mandated to preserve raw data produced from A Large Ion Collider Experiment (ALICE) experiment using the world's largest particle accelerator, the Large Hadron Collider (LHC) at European Organization for Nuclear Research (CERN). Physical medium used widely for long-term data preservation is tape, thanks to its reliability and least price per capacity compared to other media such as optical disk, hard disk, and solid-state disk. However, decreasing numbers of manufacturers for both tape drives and cartridges, and patent disputes among them escalated risk of market. As alternative to tape-based data preservation strategy, we proposed disk-only erasure-coded archival storage system, Custodial Disk Storage (CDS), powered by Exascale Open Storage (EOS), an open-source storage management software developed by CERN. CDS system consists of 18 high density Just-Bunch-Of-Disks (JBOD) enclosures attached to 9 servers through 12 Gbps Serial Attached SCSI (SAS) Host Bus Adapter (HBA) interfaces via multiple paths for redundancy and multiplexing. For data protection, we introduced Reed-Solomon (RS) (16, 4) Erasure Coding (EC) layout, where the number of data and parity blocks are 12 and 4 respectively, which gives the annual data loss probability equivalent to 5×10^-14. In this paper, we discuss CDS system design based on JBOD products, performance limitations, and data protection strategy accommodating EOS EC implementation. We present CDS operations for ALICE experiment and long-term power consumption measurement.

• Journal of KIISE:Databases
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• v.34 no.2
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• pp.133-140
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• 2007

Flash memory has penetrated our life in various forms. For example, flash memory is important storage component of ubiquitous computing or mobile products such as cell phone, MP3 player, PDA, and portable storage kits. Behind of the wide acceptance as memory is many advantages of flash memory: for instances, low power consumption, nonvolatile, stability and portability. In addition to mentioned strengths, the recent development of gigabyte range capacity flash memory makes a careful prediction that the flash memory might replace some of storage area dominated by hard disks. In order to have overwriting function, one block must be erased before overwriting is performed. This difference results in the cost of reading, writing and erasing in flash memory[1][5][6]. Since this difference has not been considered in traditional buffer replacement technologies adopted in system software such as OS and DBMS, a new buffer replacement strategy becomes necessary. In this paper, a new buffer replacement strategy, reflecting difference I/O cost and applicable to flash memory, suggest and compares with other buffer replacement strategies using workloads as Zipfian distribution and real data.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.14-21
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• 2011

A 10b 500MS/s $0.13{\mu}m$ CMOS ADC is proposed for 4G wireless communication systems such as a LTE-Advanced and SDR The ADC employs a calibration-free single-channel folding architecture for low power consumption and high speed conversion rate. In order to overcome the disadvantage of high folding rate, at the fine 7b ADC, a cascaded folding-interpolating technique is proposed. Further, a folding amplifier with the folded cascode output stage is also discussed in the block of folding bus, to improve the bandwidth limitation and voltage gain by parasitic capacitances. The chip has been fabricated with $0.13{\mu}m$ 1P6M CMOS technology, the effective chip area is $1.5mm^2$. The measured results of INL and DNL are within 2.95LSB and l.24LSB at 10b resolution, respectively. The SNDR is 54.8dB and SFDR is 63.4dBc when the input frequency is 9.27MHz at sampling frequency of 500MHz. The ADC consumes 150mW($300{\mu}W/MS/s$) including peripheral circuits at 500MS/s and 1.2V(1.5V) power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.20-27
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• 2010

This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

• Journal of Internet Computing and Services
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• v.16 no.5
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• pp.29-38
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• 2015

The Energy Storage System stores electricity for later use. This system can store electricity from legacy electric power systems or renewable energy systems into a battery device when demand is low. When there is high electricity demand, it uses the electricity previously stored and enables efficient energy usage and stable operation of the electric power system. It increases the energy usage efficiency, stabilizes the power supply system, and increases the utilization of renewable energy. The recent increase in the global interest for efficient energy consumption has increased the need for an energy storage system that can satisfy both the consumers' demand for stable power supply and the suppliers' demand for power demand normalization. In general, an energy storage system consists of a Power Conditioning System, a Battery Management System, a battery cell and peripheral devices. The specifications of the subsystems that form the energy storage system are manufacturer dependent. Since the core component interfaces are not standardized, there are difficulties in forming and operating the energy storage system. In this paper, the design of the profile structure for energy storage system and realization of private profiling system for energy storage system is presented. The profiling system accommodates diverse component settings that are manufacturer dependent and information needed for effective operation. The settings and operation information of various PCSs, BMSs, battery cells, and other peripheral device are analyzed to define profile specification and structure. A profile adapter software that can be applied to energy storage system is designed and implemented. The profiles for energy storage system generated by the profile authoring tool consist of a settings profile and operation profile. Setting profile consists of configuration information for energy device what composes energy saving system. To be more specific, setting profile has three parts of category as information for electric control module, sub system, and interface for communication between electric devices. Operation profile includes information in relation to the method in which controls Energy Storage system. The profiles are based on standard XML specification to accommodate future extensions. The profile system has been verified by applying it to an energy storage system and testing charge and discharge operations.

• Journal of the Korea Society for Simulation
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• v.18 no.3
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• pp.73-82
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• 2009

Due to the many advantages including low price, low power consumption, and miniaturization, the CMOS camera has been utilized in many applications, including mobile phones, the automotive industry, medical sciences and sensoring, robotic controls, and research in the security field. In particular, the 360 degree omni-directional camera when utilized in multi-camera applications has displayed issues of software nature, interface communication management, delays, and a complicated image display control. Other issues include energy management problems, and miniaturization of a multi-camera in the hardware field. Traditional CMOS camera systems are comprised of an embedded system that consists of a high-performance MCU enabling a camera to send and receive images and a multi-layer system similar to an individual control system that consists of the camera's high performance Micro Controller Unit. We proposed the SL-AVS (Small Size/Low power Around-View System) to be able to control a camera while collecting image data using a high speed synchronization technique on the foundation of a single layer low performance MCU. It is an initial model of the omni-directional camera that takes images from a 360 view drawing from several CMOS camera utilizing a 110 degree view. We then connected a single MCU with four low-power CMOS cameras and implemented controls that include synchronization, controlling, and transmit/receive functions of individual camera compared with the traditional system. The synchronization of the respective cameras were controlled and then memorized by handling each interrupt through the MCU. We were able to improve the efficiency of data transmission that minimizes re-synchronization amongst a target, the CMOS camera, and the MCU. Further, depending on the choice of users, respective or groups of images divided into 4 domains were then provided with a target. We finally analyzed and compared the performance of the developed camera system including the synchronization and time of data transfer and image data loss, etc.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.7
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• pp.508-519
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• 2007

Flash memory based storage has been used in various mobile systems and now is to be used in Laptop computers in the name of Solid State Disk. The Flash memory has not only merits in terms of weight, shock resistance, and power consumption but also limitations like erase-before-write property. To overcome these limitations, Flash memory based storage requires special address mapping software called FTL(Flash-memory Translation Layer), which often performs merge operation for block recycling. In order to reduce block recycling cost in NAND Flash memory based storage, we introduce another block recycling scheme which we call migration. As a result, the FTL can select either merge or migration depending on their costs for each block recycling. Experimental results with Postmark benchmark and embedded system workload show that this cost-based selection of migration/merge operation improves the performance of Flash memory based storage. Also, we present a solution of macroscopic optimal migration/merge sequence that minimizes a block recycling cost for each migration/merge combination period. Experimental results show that the performance of Flash memory based storage can be more improved by the macroscopic optimization than the simple cost-based selection.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.11
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• pp.72-77
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• 2017

Lighting systems in modern society has been developed using a combination of IT technology and LED lighting for the purpose of bringing about changes in human-centered natural lighting and to take advantage of the efficient management and energy saving of LED lighting. In this paper, we propose an LED lighting control system that can control the color temperature and brightness of LED lighting composed of 3000K Warm LEDs and 6000K Cool LEDs by using an Arduino Due and wireless communication technology such as Bluetooth and Zigbee. The Arduino Due allows the color temperature of the lighting to be adjusted in several steps by controlling the duty rate and enables many lights to be controlled using Zigbee communication capable of 1: N multiple communication. By using Bluetooth communication, it is possible to easily control the LED lighting by means of a smartphone application, thereby enhancing the convenience for the user. The wireless communication based LED lighting control system implemented in this study cannot only provide human-centered lighting through its color temperature control from 3067K to 5960K and illumination control, but can also reduce the power consumption and be used as a natural-friendly lighting system.