• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.71-78
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• 2008

In this paper, we implement the H.264/AVC baseline decoder by hardware-software partitioning under the embedded Linux Kernel 2.4.26 and the FPGA-based target board with ARM926EJ-S core. We design several IPs for the time-demanding blocks, such as motion compensation, deblocking filter, and YUV-to-RGB and they are communicated with the host through the AMBA bus protocol. We also try to minimize the number of memory accesses between IPs and the reference software (JM 11.0) which is ported in the embedded Linux. The proposed IPs and the system have been designed and verified in several stages. The proposed system decodes the QCIF sample video at 2 frame per second when 24MHz of system clock is running and we expect the bitter performance if the proposed system is designed with ASIC.

• The KIPS Transactions:PartC
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• v.10C no.6
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• pp.675-682
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• 2003

Attackers collect vulnerabilities of a target computer system to intrude into it. And using several attack methods, they acquire root privilege. They steal and alter information in the computer system, or destroy the computer sysem. So far many intrusion detection systems and firewallshave been developed, but recently attackers go round these systems and intrude into a computer system . In this paper, we propose security kernel module to prevent attackers having acquired root privilege from doing illegal behaviors. It enhances administrator authentication with additional password, so prevents attackers from doing illegal behaviors such as modification of important files and installation of rootkits. It sends warning mail about sttacker's illegal behaviors to administrators by real time. So using information in the mail, they can estabilish new security policies.

• The KIPS Transactions:PartC
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• v.14C no.5
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• pp.431-438
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• 2007

RFID system is core technology that construct ubiquitous environment for replacement of barcode technology. Use ratio of RFID system rapidly increase because the technology has many good points such as identification speed, storage space, convenience etc. But low-cost tag operates easily by query of reader, so the system happened user privacy violent problem by tag information exposure. The system studied many ways for security application, but operation capability of low-cost tag is about $5K{\sim}10K$ gates, but only $250{\sim}3K$ gates allocated security part. So it is difficult to apply security to the system. Therefore, this scheme uses dividing 64 bits and reduces arithmetic, so proposed scheme provide mutual authentication that can apply to low-cost RFID system. Existing methods divide by 4 and used 96 bits. However, that reduces 32 bits length for lightweight and reduced from communication number of times of 7 times to 5 times. Also, because offer security by random number than existing scheme that generate two random numbers, that is more efficient. However, uses hash function for integrity that was not offered by XOR arithmetic and added extension of proposed scheme. Extended scheme is not offered efficiency than methods that use XOR arithmetic, but identification distance is mode that is proposed secure so that can use in for RFID system.

• Transactions of the Korean Society of Automotive Engineers
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• v.22 no.2
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• pp.17-22
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• 2014

Recently, the quick heating performance is an important issue in the car because engine power becomes so high. So car makers have been adapted the additional heating devices as like PTC(Positive Temperature Coefficient) heater. And the quick cooling performance is also important issue because its result is used in the IQS(Initial Quality Study). In this paper, control of the HVAC(Heating, Ventilation and Air Conditioning) intake door has been studied for the quick heating and cooling performance. Heating performance is improved $4.0^{\circ}C$ at $-20^{\circ}C$ ambient temperature after 20 minutes. And cooling performance is improved $1.5^{\circ}C$ at $35^{\circ}C$ ambient temperature after 10 minutes. In addition, intake door control system brings on the cost reduction because the flab door can be eliminated. This intake door control system has been adapted to the new developing cars.

• Journal of the Korean Ceramic Society
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• v.38 no.5
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• pp.431-437
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• 2001

본 연구에서는 양이온 교환반응에 의해 Na-Mont와 R$_{11}$SO$_4$로부터 R$_{11}$SO$_4$-Mont 층간화합물을 합성한 후, 이 R$_{11}$SO$_4$-Mont 층간화합물을 다시 제 4차 유기 양이온인 (Et)$_4$N$^{+}$ 이온 및 (Bu)$_4$N$^{+}$ 이온과 반응시켜 그 거동을 살펴보았다. R$_{11}$SO$_4$-Mont를 (Et)$_4$N$^{+}$이온과 반응시켰을 대보다 (Bu)$_4$N$^{+}$ 이온과 반응시킨 경우에 좀 더 큰 층간거리가 얻어졌다. R$_{11}$SO$_4$-Mont를 (Et)$_4$N$^{+}$이온 및 (Bu)$_4$N$^{+}$과 반응시켜 얻은 층간화합물을 다시 아세토니트릴, 에탄올 및 디옥산과 팽윤반응을 수행한 결과 층간거리가 확장되었으나, 이는 Na-Mont를 R$_{11}$SO$_4$와 48시간 교환 반응시킨 후에 교환용액 하에서 얻은 R$_{11}$SO$_4$-Mont의 층간거리에 불과했다. 원소분석결과, R$_{11}$SO$_4$-Mont와 (Bu)$_4$N$^{+}$를 반응시킬 경우 반응이 반응식 b에 의거 진행되고, (Bu)$_4$N-Mont를 R$_{11}$SO$_4$와 반응시킬 경우에는 반응식 c에 의거 진행됨을 예측할 수 있었다.의거 진행됨을 예측할 수 있었다.

• Journal of Advanced Navigation Technology
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• v.22 no.5
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• pp.400-408
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• 2018

Wide area augmentation system is a system that generates and transmits correction and Integrity information for use in wide area. Typical system is SBAS. In the United States, it operates under the name WAAS, EGNOS in Europe, MSAS in Japan, SDCM in Russia, GAGAN in India. it is developing Korean SBAS which named KASS by 2022 in Korea. SBAS is a standard System that is operated as civil aviation service base and set as international standards by ICAO. So the correction data can only is used for civil SPS receiver. In this paper, we discuss C1P1 DCB estimation which need to use SPS correction service for PPS receiver. Then we analyze C1P1 DCB correction effect under standalone Satellite Navigation and method to use PPS receiver under SPS DGPS. Finally we organize wide area augmentation system for PPS receiver and analysis performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.888-889
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• 2015

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.481-484
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• 2007

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.12
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• pp.1612-1617
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• 2020

Recently, research to reduce the accident rate by actively adopting artificial intelligence technology in the field of disaster safety technology is spreading. In particular, it is important to quickly search the Rescue Requester in order to effectively perform rescue activities at the disaster site. However, it is difficult to search for Rescue Requester due to the nature of the disaster environment. In this paper, We intend to develop an artificial intelligence system that can be operated in a smart helmet for firefighters to search for a rescue requester. To this end, the optimal SoC was selected and developed as an embedded system, and by testing a general-purpose artificial intelligence S/W, the embedded system for future smart helmet research was verified to be suitable as an artificial intelligence S/W operating platform.

• Journal of the Semiconductor & Display Technology
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• v.21 no.4
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• pp.27-32
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• 2022

RISC-V is an open instruction set architecture (ISA) developed in 2010 at UC Berkeley, and active research is being conducted as a processor to compete with ARM. In this paper, we propose an SoC system including an RV32I ISA-based 32-bit 5-stage pipeline processor and AHB bus master. The proposed RISC-V processor supports 37 instructions, excluding FENCE, ECALL, and EBREAK instructions, out of a total of 40 instructions based on RV32I ISA. In addition, the RISC-V processor can be connected to peripheral devices such as BRAM, UART, and TIMER using the AHB-lite bus protocol through the proposed AHB bus master. The proposed SoC system was implemented in Arty A7-35T FPGA with 1,959 LUTs and 1,982 flip-flops. Furthermore, the proposed hardware has a maximum operating frequency of 50 MHz. In the Dhrystone benchmark, the proposed processor performance was confirmed to be 0.48 DMIPS.