• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.111-121
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• 2012

In this paper, a poly-Si thin film transistor with ${\sim}0.5{\mu}m$ gate length was fabricated and its electrical characteristics are optimized. From the results, it was verified that making active region with larger grain size using low temperature annealing is an efficient way to enhance the subthreshold swing, drain-induced barrier lowering and on-current characteristics. A SONOS flash memory was fabricated using this poly-Si channel process and its performances are analyzed. It was necessary to optimize O/N/O thickness for the reduction of electron back tunneling and the enhancement of its memory operation. The optimized device showed 2.24 V of threshold voltage memory windows which coincided with a well operating flash memory.

• Journal of the Korean Operations Research and Management Science Society
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• v.17 no.1
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• pp.117-117
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• 1992

Pubilc utility industries including the electric utility industry are facing a new stream of privatization com-petition with the private sector and deregulation. The necewssity to solve now and in the future power supply and demand problems has been increasing through the sophisticated generation expansion plan(GEP) approach con-sidering not only KEPCo's supply-side resources but also outside resources such as non-utility generation(NUG) demand-side management (DSM). Under the environmental situation in the current electric utility industry a new approach is needed to acquire multiple resources competitively. This study presents the development of a modified electric generation expansion analysis system(EGEAS) model with avoided cost based on the existing EGEAS model which is a dynamic program to develope an optimal generation expansion plan for the electric utility. We are trying to find optimal GEP in Korea's case using our modified model and observe the difference for the level of reliabilities such as the reserve margin(RM) loss of load probability(LOLP) and expected unserved energy percent(EUEP) between the existing EGEAS model and our model. In addition we are trying to calculate avoided cost for NUG resources which is a criterion to evaluate herem and test possibility of connection calculation of avoided cost with GEP implementation using our modified model. The results of our case study are as follows. First we were able to find that the generation expansion plan and reliability measures were largely influenced by capacity size and loading status of NUG resources, Second we were able to find that avoided cost which are criteria to evaluate NUG resources could be calculated by using our modified EGEAS model with avoided cost. We also note that avoided costs were calculated by our model in connection with generation expansion plans.

• Journal of the Korean Institute of Intelligent Systems
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• v.23 no.5
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• pp.385-391
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• 2013

Big Data is data of big size which is not processed, collected, stored, searched, analyzed by the existing database management system. The parallel genetic algorithm using the Hadoop for BigData technology is easily realized by implementing GA(Genetic Algorithm) using MapReduce in the Hadoop Distribution System. The previous study that the genetic algorithm using MapReduce is proposed suitable transforming for the GA by MapReduce. However, they did not show good performance because of frequently occurring data input and output. In this paper, we proposed the MRPGA(MapReduce Parallel Genetic Algorithm) using improvement Map and Reduce process and the parallel processing characteristic of MapReduce. The optimal solution can be found by using the topology, migration of parallel genetic algorithm and local search algorithm. The convergence speed of the proposal method is 1.5 times faster than that of the existing MapReduce SGA, and is the optimal solution can be found quickly by the number of sub-generation iteration. In addition, the MRPGA is able to improve the processing and analysis performance of Big Data technology.

• Korean Chemical Engineering Research
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• v.55 no.4
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• pp.542-547
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• 2017

Ultrasound-assisted extraction (UAE) has attracted growing interest, as it is an effective method for the rapid extraction of bioactive compounds from plants with a high extraction efficiency comparable to the conventional extraction. In this study, UAE was used for the extraction of polyphenols from lipid extracted microalgae (Tetraselmis KCTC 12236BP) and the effects of five extraction variables on the total phenolic compounds (TPC) were studied. For the optimization of extraction parameters, particle size, solid-to-liquid (L/S) ratio, ethanol concentration, extraction temperature and extraction time have been examined as independent variables. All variables exhibited the significant effects on the extraction of TPC and extraction temperature showed the most significant effect among five variables. The optimal extraction conditions were the extraction using mixed particle, S/L ratio of 10%, ethanol concentration of 60%, extraction temperature of $100^{\circ}C$ and extraction time of 30 min, which gave the 8.7 mg GAE/g DW for TPC. Compared with conventional hot-water extraction, TPC extraction under UAE was increased by up to 1.8 fold with same extraction condition. This study showed that UAE under low temperature and short extraction time was proven to be an effective extraction process for TPC production from LEA compared to conventional hot-water extraction process.

• The KIPS Transactions:PartA
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• v.13A no.5 s.102
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• pp.413-420
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• 2006

Most vendors of digital signal processors (DSPs) support a Harvard architecture, which has two or more memory buses, one for program and one or more for data and allow the processor to access multiple words of data from memory in a single instruction cycle. We already addressed how to efficiently assign data to multi-memory banks in our previous work. This paper reports on our recent attempt to optimize run-time memory. The run-time environment for dual data memory banks (DBMBs) requires two run-time stacks to control activation records located in two memory banks corresponding to calling procedures. However, activation records of two memory banks for a procedure are able to have different size. As a consequence, dual run-time stacks can be unbalanced whenever a procedure is called. This unbalance between two memory banks causes that usage of one memory bank can exceed the extent of on-chip memory area although there is free area in the other memory bank. We attempt balancing dual run-time slacks to enhance efficiently utilization of on-chip memory in this paper. The experimental results have revealed that although our algorithm is relatively quite simple, it still can utilize run-time memories efficiently; thus enabling our compiler to run extremely fast, yet minimizing the usage of un-time memory in the target code.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.3
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• pp.230-236
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• 2020

A trash screen is installed in front of the inflow channel of a drainage pumping station, sewage treatment plant, and a power plant to block floating contaminants. The bottleneck phenomenon, which decreases the water inflow, causes damage to the damper as a result of clogging in between the screen if string type obstacles are not removed. In this paper, the apron was removed, and the screen was expanded, to prevent breakage of the bottleneck phenomenon and string type obstacles. This was designed using an extended rake by adding an inner rake in between the screen interspace to remove the bottleneck phenomenon and string type obstacles. To design the inner rake that satisfies the allowable stresses of the existing damper rake, the experiment points were determined according to the experimental design method using the inner rake vertical length and the thickness of the reinforced section as parameters. The use of the ANSYS static structural module and statistical analysis tool R software gives the optimized shape according to the response surface method. The relative error between the response surface analysis results and the simulation results was 1.63% of the determined optimal design-point rake length of 210.2 mm and the reinforcement section thickness of 2 mm. Through empirical experiments, a test rake was constructed to the actual size, and approximately 97% of the bottleneck phenomenon and string type obstacles could be removed.

• The Journal of the Korea Contents Association
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• v.8 no.5
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• pp.72-81
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• 2008

High Performance DSP usually supports cache and internal memory. For an optimal implementation of a multimedia stream application on such a high performance DSP, one needs to utilize the cache and internal memory efficiently. In this paper, we investigate performance analysis of cache, and internal memory configuration and placement necessary to achieve an optimal implementation of multimedia stream applications like motion picture encoder on high performance DSP, TMS320C6000 series, and propose strategies to improve performance for cache and internal memory placement. From the results of analysis and experiments, it is verified that 2-way L2 cache configuration with the remaining memory configured as internal memory shows relatively good performance. Also, it is shown that L1P cache hit rate is enhanced when frequently called routines and routines having caller-callee relationships with them are continuously placed in the internal memory and that L1D cache hit rate is enhanced by the simple change of the data size. The results in the paper are expected to contribute to the optimal implementation of multimedia stream applications on high performance DSPs.

• Journal of Korean Society of Transportation
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• v.23 no.3 s.81
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• pp.35-47
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• 2005

This paper is to review a literature concerning Bus Transit Route Network Design(BTRNDP), to describe a future study direction for a systematic application for the BTRNDP. Since a bus transit uses a fixed route, schedule, stop, therefore an approach methodology is different from that of auto network design problem. An approach methodology for BTRNDP is classified by 8 categories: manual & guideline, market analysis, system analytic model. heuristic model. hybrid model. experienced-based model. simulation-based model. mathematical optimization model. In most previous BTRNDP, objective function is to minimize user and operator costs, and constraints on the total operator cost, fleet size and service frequency are common to several previous approach. Transit trip assignment mostly use multi-path trip assignment. Since the search for optimal solution from a large search space of BTRNDP made up by all possible solutions, the mixed combinatorial problem are usually NP-hard. Therefore, previous researches for the BTRNDP use a sequential design process, which is composed of several design steps as follows: the generation of a candidate route set, the route analysis and evaluation process, the selection process of a optimal route set Future study will focus on a development of detailed OD trip table based on bus stop, systematic transit route network evaluation model. updated transit trip assignment technique and advanced solution search algorithm for BTRNDP.

• Journal of the Korea institute for structural maintenance and inspection
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• v.15 no.4
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• pp.165-174
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• 2011

This research aims at the optimal constitution of sensors required to identify the structural shortcoming of roller-coaster. In this research we analyzed the dynamic characteristics of roller-coaster by three dimensional FE modelling, decided on the appropriate location and number of sensors through optimal transducer theory, abstracted the mathematical value of modal features before and after damage on the basis of optimally placed and numbered sensors. and then presented it as a primary information about the basic structure which would be applied to damage estimation. As a target structure, the roller-coater at Seoul Children's Grand Park was chosen and built as a model reduced by one twentieth in size. In order to consider the Kinetics features particular to the roller-coaster structure, we made an exact three-dimensional FE modelling for the model structure by means of Spline function. As for the proper location and number of sensors, it was done by applying EIM and EOT. We also estimated the damage from the combination of strength, flexibility, and model corelation after abstracting the value of modal features. Finally the optimal transducer theory presented here in this research was proved to be valid, and the structural damage was well identified through changes in strength and flexibility. As a result, we were able to present the optimal constitution of sensors needed for the analysis of dynamic characteristics and the development of techniques in dynamic characteristics, which would ultimately contribute to the development of health monitoring for roller-coaster.

• Korean Journal of Digital Imaging in Medicine
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• v.6 no.1
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• pp.24-30
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• 2003

Flat-panel detector(FPD) is the driving force for realizing the next gene ration of x-ray system. In this study, we developed amorphous selenium(a-Se) based flat-panel digital X-ray detector(DXD) for radiography. The prototype detector consists of an amorphous selenium layer and a thin-film transistor(TFT) array. Comparing to other papers1)-4), optimization of amorphous selenium and progress of evaporation were similar. The pixel pitch of fabricated detector was $139{\mu}m$, fill factor was 86%, and the size was 14"${\times}$8.5". Hand and test bar pattern images were acquired. A high modulation transfer function(MTF) factor was obtained: 58% at 3.0 lp/mm.