• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.312-320
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• 2003

This work describes an 8b 200 MHz 0.18 urn CMOS analog-to-digital converter (ADC) based on a pipelined architecture for flat panel display applications. The proposed ABC employs an improved bootstrapping technique to obtain wider input bandwidth than the sampling tate of 200 MHz. The bootstrapuing technique improves the accuracy of the input sample-and-hold amplifier (SHA) and the fast fourier transform (FFT) analysis of the SHA outputs shows the 7.2 effective number of bits with an input sinusoidal wave frequency of 500 MHz and the sampling clock of 200 MHz at a 1.7 V supply voltage. Merged-capacitor switching (MCS) technique increases the sampling rate of the ADC by reducing the number of capacitors required in conventional ADC's by 50 % and minimizes chip area simultaneously. The simulated ADC in a 0.18 um n-well single-poly quad-metal CMOS technology shows an 8b resolution and a 73 mW power dissipation at a 200 MHz sampling clock and a 1.7 V supply voltage.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.8
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• pp.1196-1202
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• 2009

In this paper, an estimator design of underwater environment changes is proposed by using observer techniques for ROV control system. The underwater environment changes are considered as an external disturbance term for ROV model and it is added into the input term of ROV model. To estimate the environment changes, a PI observer which does not effect the external disturbance input term is proposed. To verify the effectiveness of the proposed method, the step and the sinusoidal environment changes are considered in simulation. The proposed method will be applied to design the haptic controller for ROV in future.

• Journal of the Earthquake Engineering Society of Korea
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• v.18 no.3
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• pp.125-132
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• 2014

In this study, a series of dynamic centrifuge tests were performed for a soil-foundation-structural interaction system in dry sand with various embedded depths and superstructure conditions. Sinusoidal wave, sweep wave and real earthquake were used as input motion with various input acceleration and frequencies. Based on the results, a natural period and an earthquake load for soil-structure interaction system were evaluated by comparing the free-field and foundation accelerations. The natural period of free field is longer than that of the soil-foundation-structure system. In addition, it is confirmed that the earthquake load for soil-foundation-structure system is smaller than that of free-field in short period region. In contrast, the earthquake load for soil-foundation-structure interaction system is larger than that of free-field in long period region. Therefore, the current seismic design method, applying seismic loading of free-field to foundation, could overly underestimate seismic load and cause unsafe design for long period structures, such as high-rise buildings.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.3
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• pp.56-63
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• 1999

In this paper, we realize the active PFC(Power Factor Correction) system of BF (Boost Forward) converter with PWM-PFM control technique to control DC output voltage, and to control the input current with sinusoidal wave synchronized by the converter and inverter using power switching element, FET and IGBT. The control circuit of the suggested Boost converter is implemented with a microprocessor 80C196. After making the ratio of output voltage to current as 50V/1A and the duty ratio greater than 0.5. When input voltage is 30V and boost inductance is 1.1mH. We control the voltage changing rate according to the variation of load resistance using a PWM-PFM control technique. And finally we prove experimentally. PF can be improved up to 0.96 using the current shaping technique.

• Transactions of the Korean Society of Automotive Engineers
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• v.9 no.5
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• pp.157-164
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• 2001

This paper performs static and dynamic tests of a multi-leaf spring and a tapered leaf spring to investigate their hysteretic characteristics. In the static test, trapezoidal input load is applied with 0.1Hz excitation frequency and with zero initial loading conditions. In the dynamic test, sinusoidal input load is applied with five excitation amplitudes and three excitation frequencies. In these tests, static and dynamic hysteretic characteristics of the multi-leaf spring and the tapered leaf spring are compared, and, the effects of excitation amplitudes and frequencies on dynamic spring rate are also shown. In this paper, actual vehicle tests are performed to study the effects of hysteretic characteristics of the large-sized truck's handling performance. The multi-leaf spring or the tapered leaf spring is used in the front suspension. The actual vehicle test is performed in a double lane change track with three velocities. Lateral acceleration, yaw rate and roll angle are measured using a gyro-meter located at the mass center of the cab. The test results showed that a large-sized truck with a tapered leaf spring needs to have an additional apparatus such as roll stabilizer bar to increase the roll stabilizer due to hysteretic characteristics.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.6
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• pp.596-603
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• 2002

In this paper a new harmonic reduction method of three-phase diode rectifiers is proposed to improve input current performance using the zero-sequence harmonics injection technique. The proposed mothed, based on the third-harmonic injection, employs two half-bridge inverters and two single-phase transformers to independently shape the positive and negative dc rail currents of the diode rectifier. The actively shaped zero-sequence harmonic currents are t]ten circulated through the ac side of the rectifier using a zigzag transformer This results in pure sinusoidal input currents in the three-phase diode rectifier. Experimental results on a 1.5kVA prototype are provided to validate the proposed technique.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.182-192
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• 2015

This study develops a digital control scheme with power factor correction for a front-end converter in an electric vehicle battery charger. The front-end converter acts as the boost-type switching-mode rectifier. The converter assumes the two roles of the battery charger, which include power factor control and robust charging performance. The proposed control scheme consists of a charging control algorithm and a grid current control algorithm. The scheme aims to obtain unity input power factor and robust performance. Based on the linear average model of the converter, a constant-current constant-voltage charging control algorithm that passes through only one proportional-integral controller and a current feed-forward path is proposed. In the current control algorithm, we utilized a second band pass filter, a single-phase phase-locked loop technique, and a duty-ratio feed-forward term to control the grid current to be in phase with the grid voltage and achieve pure sinusoidal waveform. Simulations and experiments were conducted to verify the effectiveness of the proposed control scheme, both simulations and experiments.

• Advances in Computational Design
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• v.2 no.4
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• pp.283-291
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• 2017

High frequency full bridge series resonant inverters have become increasingly popular among power supply designers. One of the most important parameter for a High Frequency Full Bridge Series Resonant Inverter is optimal coil design. The optimal coil designing procedure is not a easy task. This paper deals with the New Approach to Optimal Design Procedure for a Real-time High Frequency Full Bridge Series Resonant Inverter in Induction Heating Equipment devices. A new design to experimental modelling of the physical properties and a practical power input simulation process for the non-sinusoidal input waveform is accepted. The design sensitivity analysis with Levenberg-Marquardt technique is used for the optimal design process. The proposed technique is applied to an Induction Heating Equipment devices model and the result is verified by real-time experiment. The main advantages of this design technique is to achieve more accurate temperature control with a huge amount of power saving.

• Journal of Power Electronics
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• v.18 no.2
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• pp.407-417
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• 2018

A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. These converters can transfer an unsteady high ac voltage with distortion into a regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, as well as input and output filters. The topological family includes forward, push-pull, half-bridge, and full-bridge modes. In order to achieve a reliable three-level ac-ac conversion, and to overcome the surge voltage and surge current of the cycloconverter, a phase-shifted control strategy is introduced in this paper. A prototype is presented with experimental results to demonstrate that the proposed converters have five advantages including high frequency electrical isolation, lower voltage stress of the power switches, bi-directional power flow, low THD of the output voltage, and a higher input power factor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.5
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• pp.1325-1331
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• 1996

In this paper, a new current-memory circuit is proposed that reduces the clock feedthrough(CFT) error voltage causing total harmonic distortion(THD) increment in switched-current(SI) systems. Using PMOS transistor in CMOS complementary, the proposed one reduces output distortion current due to the CFT errorvoltage. A proposed current-memory is designed using a 1.2.mu.m CMOS process anda 1MHz sinusoidal signal having a 68.mu.A amplitude current is applied as input (sampling frequency:20MHz). It hasbeen shown from the simulation that the output distortion current effected by the CFT error voltage is reduced by approximately 10 times the error voltage of conventional one, THD is -57dB in case ofappling 1kHz frequency input signalwith 0.5 peak signal-to-bias current ratio.