• 제목/요약/키워드: Single-ended

검색결과 163건 처리시간 0.027초

2.4GHz 대역에서의 응용을 위한 광대역 RF모듈 설계 및 제작 (Design and Fabrication of a Broadband RF Module for 2.4GHz Band Applications)

  • 양두영;강봉수
    • 한국콘텐츠학회논문지
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    • 제6권4호
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    • pp.1-10
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    • 2006
  • 본 논문에서는 2.4GHz 대역에서의 응용을 위한 광대역 RF 모들을 설계하고 제작하였다. 무선 주파 신호를 중간 주파수로 변환하기 위한 RF 모듈은 3단 증폭기로 이루어진 저잡음 증폭기(LNA), 단종단 게이트 믹서, 정합 회로, 헤어핀 라인 대역 통과 필터, 쳬비셰프 저역 통과 필터로 구성하였다. 저잡음 증폭기는 높은 이득과 안정도를 갖도록 설계하였으며, 단종단 게이트 믹서는 높은 변환이득과 넓은 동작 영역을 갖도록 설계하였다. 광대역 RF모듈의 해석에서는 복합화된 하모닉 밸런스드 기법을 사용하여 RF모듈의 동작 특성을 해석하였다. 설계된 RF 모듈은 55.2dB의 변환이득, 1.54dB의 낮은 잡음 특성, $-120{\sim}-60dBm$의 넓은 RF전력 동작 영역, -60dBm의 낮은 고조파 성분 그리고 RF, IF, LO포트 간에 우수한 분리 특성을 갖는다.

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Cascode 구조를 이용한 밀리미터파 광대역 평형 증폭기의 연구 (Study on Millimeter-wave Broadband Balanced Amplifiers with Cascode Configuration)

  • 임병옥;권혁자;문성운;안단;이문교;이상진;전병철;박현창;이진구
    • 대한전자공학회논문지SD
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    • 제44권9호
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    • pp.18-24
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    • 2007
  • 본 논문에서는 cascode 구조에 shunt peaking 기술을 접목시킨 밀리미터파 광대역 단일 종단 증폭기와 tandem 결합기를 이용한 밀리미터파 광대역 평형 증폭기를 설계 및 제작하였다. 증폭기 제작을 위하여 0.1 ${\mu}m\;{\Gamma}-gate$ GaAs PHEMT가 사용되었다. 제작된 단일 종단 증폭기는 37 GHz($18.5{\sim}55.5$ GHz)의 3 dB 대역폭과 47 GHz에서 9.38 dB의 최대 $S_{21}$ 이득 특성을 얻을 수 있었다. 밀리미터파 대역용 광대역 평형 증폭기 제작을 위해 사용된 tandem 결합기는 $30{\sim}60$ GHz에서 평균 3.5 dB의 결합 계수 및 -23 dB 이하의 반사 손실을 얻을 수 있었다. 제작된 평형 증폭기는 44.5 GHz($21{\sim}65.5$ GHz)의 3 dB 대역폭을 얻었으며, 최대 $S_{21}$ 이득은 60 GHz에서 10.4 dB의 값을 얻을 수 있었다. Tandem 결합기를 이용한 평형 증폭기는 shunt peaking 기술을 이용한 단일 종단 증폭기에 비해 20% 증가된 3 dB 대역폭을 보였으며, 더 낮은 입력 및 출력 반사 손실을 얻을 수 있었다.

Simplified Design Procedure for Reinforced Concrete Columns Based on Equivalent Column Concept

  • Afefy, Hamdy M.;El-Tony, El-Tony M.
    • International Journal of Concrete Structures and Materials
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    • 제10권3호
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    • pp.393-406
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    • 2016
  • Axially loaded reinforced concrete columns are hardly exist in practice due to the development of some bending moments. These moments could be produced by gravity loads or the lateral loads. First, the current paper presents a detailed analysis on the overall structural behavior of 15 eccentrically loaded columns as well as one concentrically loaded control one. Columns bent in either single curvature or double curvature modes are tested experimentally up to failure under the effect of different end eccentricities combinations. Three end eccentricities ratio were studied, namely, 0.1b, 0.3b and 0.5b, where b is the column width. Second, an expression correlated the decay in the normalized axial capacity of the column and the acting end eccentricities was developed based on the experimental results and then verified against the available formula. Third, based on the equivalent column concept, the equivalent pin-ended columns were obtained for columns bent in either single or double curvature modes. And then, the effect of end eccentricity ratio was correlated to the equivalent column length. Finally, a simplified design procedure was proposed for eccentrically loaded braced column by transferring it to an equivalent axially loaded pin-ended slender column. The results of the proposed design procedure showed comparable results against the results of the ACI 318-14 code.

Design of Parallel-Operated SEPIC Converters Using Coupled Inductor for Load-Sharing

  • Subramanian, Venkatanarayanan;Manimaran, Saravanan
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.327-337
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    • 2015
  • This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

선단 하부지반 그라우팅된 개단강관말뚝의 연직 지지력에 관한 연구 (Study on the Vertical Pile Capacity of Base-grouted Pile)

  • 정두환;최용규;정성교
    • 한국지반공학회논문집
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    • 제15권2호
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    • pp.165-180
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    • 1999
  • 모형 압력 토조에 개단, 폐단, 관내토 그라우팅, 그리고 선단 하부지반 그라우팅 말뚝들을 설치하여 수행된 재하실험을 통해 그 지지력을 비교하였고, 유사화된(Simulated) 해진시 말뚝의 설치깊이를 변화시켜 선단 하부지반 그라우팅 말뚝의 안정성을 검토하였다. 또한, 재하실험과 해진 실험은 2개와 4개로 된 군말뚝에 대해서도 수행되었다. 관내토 선단부만 그라우팅한 말뚝의 지지력은 선단 지반 교란으로 인한 선단지지력 감소로 개단말뚝에 비해 극한지지력이 약 11.2~30.8%정도 작았다. 관내토 선단 하부지반 그라우팅한 말뚝의 지지력은 개단말뚝의 지지력보다 약 23.8~33.9%정도 증가하였으며, 이는 폐단말뚝의 지지력과 비슷하였다. 선단 하부지반 그라우팅된 군말뚝은 개단 군말뚝에 비해 증가하였는데, 2개의 군말뚝의 경우에는 14.6~31.8%만큼 지지력이 증가하였으며, 4개의 군말뚝의 경우는 15.3~22.4%만큼 증가하였다. 심해에서 발생된 해진시 관내토 선단 하부지반 그라우팅된 개단말뚝의 안정성은 말뚝의 설치 형태와 말뚝의 지중관입 길이에 따라 달라졌다. 외말뚝의 경우에는 지중 관입 깊이가 20m보다 깊어지면 안정한 상태를 유지할 수 있었으나, 12m보다 짧은 말뚝은 파괴될 수 있었고, 12m보다 긴 말뚝의 경우에는 가동(Mobility) 상태를 유지할 수 있었다. 군말뚝의 경우에는 지중 관입깊이가 7m이상이면 지지력의 일부만 감소하여 약간 변위하는 "Mobility" 상태를 유지할 수 있었다.유지할 수 있었다.

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A New Photovoltaic System Architecture of Module-Integrated Converter with a Single-sourced Asymmetric Multilevel Inverter Using a Cost-effective Single-ended Pre-regulator

  • Manoharan, Mohana Sundar;Ahmed, Ashraf;Park, Joung-Hu
    • Journal of Power Electronics
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    • 제17권1호
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    • pp.222-231
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    • 2017
  • In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

고효율을 갖는 단일 전력변환 직렬 공진형 AC-DC 컨버터 (Single-Power-Conversion Series-Resonant AC-DC Converter with High Efficiency)

  • 정서광;차우준;이성호;권봉환
    • 전력전자학회논문지
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    • 제21권3호
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    • pp.224-230
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    • 2016
  • In this study, a single-power-conversion series-resonant ac-dc converter with high efficiency and high power factor is proposed. The proposed ac-dc converter consists of single-ended primary-inductor converter with an active-clamp circuit and a voltage doubler with series-resonant circuit. The active-clamp circuit clamps the surge voltage and provides zero-voltage switching of the main switch. The series-resonant circuit consists of leakage inductance $L_{lk}$ of the transformer and resonant capacitors $ C_{r1}$ and $ C_{r2}$. This circuit also provides zero-current switching of output diodes $D_1$ and $D_2$. Thus, the switching loss of switches and reverse-recovery loss of output diodes are considerably reduced. The proposed ac-dc converter also achieves high power factor using the proposed control algorithm without the addition of a power factor correction circuit and a dc-link electrolytic capacitor. A detailed theoretical analysis and the experimental results for a 1kW prototype are discussed.

New Circuit Topology of Single-Ended Soft-Switching PWM High Frequency Inverter and Its Performance Evaluations

  • Deguchi Y.;Moisseev S.;Nakaoka M.;Hirota I.;Yamashita H.;Omori H.;Terai H.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.247-250
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    • 2001
  • This paper presents a simple and cost effective circuit topology of single-ended type high frequency quasi-resonant PWM inverter using IGBTs, which can operate under wide soft switching operation range based on ZCS for main power switch as compared with a conventional active voltage-clamped ZVS-PWM high frequency quasi-resonant inverter developed previously. In principle, this new circuit topology can efficiently operate under a constant frequency PWM control-based power regulation scheme. In particular, it is noted that the zero current soft switching (ZCS) commutation can achieve for the main active power switch. On the other hand, the zero voltage soft switching (ZVS) commutation can also achieve for the auxiliary active power switch. The operating principle of this high-frequency Inverter treated here and its power regulation characteristics are illustrated on the basis of the simulation and feasible experimental results.

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수동 소자를 이용한 ADSL POTS Splitter의 체계적인 설계 (A Systematical Design of ADSL POTS Splitter Using Passive Devices)

  • 박지만;김진태;소운섭
    • 한국통신학회논문지
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    • 제24권6A호
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    • pp.913-919
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    • 1999
  • ADSL POTS splitter를 설계하기 위한 체계적인 합성 과정을 제안하였다. 이들은 single-ended 인덕터, 균형 인덕터, 그리고 균형 밀결합 변압기 형태의 저역-통과 여파기로 구성된다. 이 3개의 저역-통과 여파기를 시뮬레이션한 결과, 주파수 특성이 일치함을 보여준다. ADSL 시스템에 적용하기 위해, 상업용 균형 밀결합 변압기를 이용하여 POTS splitter를 설계하였다. 그것을 실험한 결과, ADSL 시스템에서 POTS splitter가 0.2 kHz에서 3.4kHz까지의 주파수 범위에서(또는 음성 대역 주파수에서) $\pm$0.5dB보다 작은 리플 데시벨과 0.6 kHz에서 3.2kHz까지의 주파수 범위에서 130 $\mu\textrm{s}$보다 작은 지연 왜곡을 가진다는 것을 알았다.

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A Single-Ended ADC with Split Dual-Capacitive-Array for Multi-Channel Systems

  • Cho, Seong-Jin;Kim, Ju Eon;Shin, Dong Ho;Yoon, Dong-Hyun;Jung, Dong-Kyu;Jeon, Hong Tae;Lee, Seok;Baek, Kwang-Hyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권5호
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    • pp.504-510
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    • 2015
  • This paper presents a power and area efficient SAR ADC for multi-channel near threshold-voltage (NTV) applications such as neural recording systems. This work proposes a split dual-capacitive-array (S-DCA) structure with shifted input range for ultra low-switching energy and architecture of multi-channel single-ended SAR ADC which employs only one comparator. In addition, the proposed ADC has the same amount of equivalent capacitance at two comparator inputs, which minimizes the kickback noise. Compared with conventional SAR ADC, this work reduces the total capacitance and switching energy by 84.8% and 91.3%, respectively.