• Title/Summary/Keyword: Single-chip

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The Subjective Evaluation on White Light Property and Color Appearance of Single Chip LED and RGB Multi Chip LED (단일칩 LED와 RGB 멀티칩 LED의 백색광 특성 및 색 보임에 대한 주관평가 연구)

  • Sim, Yun-Ju;Kim, In-Tae;Choi, An-Seop
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.1
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    • pp.1-8
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    • 2015
  • To produce the white light, there are a single chip method using the blue light and phosphor coating, a multi chip method by mixing R, G, B light.. Multi chip method is proper for the smart lighting system by controling color and color temperature. And color rendering of single chip LED is good by even spectral distribution. To apply application technic like smart light system, this paper analyzed the properties of single chip LED and RGB multi chip LED, and implemented the 2 part subject evaluation for single chip LED and RGB multi chip LED. The first part is comparison of properties for single chip LED and RGB multi chip and second part is color appearance evaluation of 8 colors in each lighting environment.

Electrode-Evaporation Method of III-nitride Vertical-type Single Chip LEDs

  • Kim, Kyoung Hwa;Ahn, Hyung Soo;Jeon, Injun;Cho, Chae Ryong;Jeon, Hunsoo;Yang, Min;Yi, Sam Nyung;Kim, Suck-Whan
    • Journal of the Korean Physical Society
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    • v.73 no.9
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    • pp.1346-1350
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    • 2018
  • An electrode-evaporation technology on both the top and bottom sides of the bare vertical-type single chip separated from the traditional substrate by cooling, was developed for III-nitride vertical-type single chip LEDs with thick GaN epilayer. The post-process of the cooling step was followed by sorting the bare vertical-type single chip LEDs into the holes in a pocket-type shadow mask for deposition of the electrodes at the top and bottom sides of bare vertical-type single chip LEDs without the traditional substrate for electrode evaporation technology for vertical-type single chip LEDs. The variation in size of the hole between the designed shadow mask and the deposited electrodes owing to the use of the designed pocket-type shadow mask is investigated. Furthermore, the electrical and the optical properties of bare vertical-type single chip LEDs deposited with two different shapes of n-type electrodes using the pocket-type shadow mask are investigated to explore the possibility of the e-beam evaporation method.

Single-Chip Microprocessor Control for Switched Reluctance Motor Drive

  • Hao Chen;Ahn, Jin-Woo
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.2B no.4
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    • pp.207-213
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    • 2002
  • The paper introduces a switched reluctance motor drive system based on an 80C31 and an Intel 80C 196KB single-chip microprocessor control. Advance schemes are used in turn-on and turn-off angles with the power converter's main switches during traction and regenerative braking. The principles of traction speed control and braking torque control are given. The hardware and software patterns in the 80c31 and the Intel 80C196KB single-chip microprocessor control system are also presented.

A Single-Chip CMOS Digitally Synthesized 0-35 MHz Agile Function Generator

  • Meenakarn, C.;Thanachayanont, A.
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1984-1987
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    • 2002
  • This paper describes the design and implementation of a single-chip digitally synthesized 0-35MHz agile function generator. The chip comprises an integrated direct digital synthesizer (DDS) with a 10-bit on- chip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-$\mu\textrm{m}$ CMOS technology. The main features of the chip include maximum clock frequency of 100 MHz at 3.3-V supply voltage, 32-bit frequency tuning word resolution, 12-bit phase tuning word resolution, and an on-chip 10-bit DAC. The chip provides sinusoidal, ramp, saw-tooth, and random waveforms with phase and frequency modulation, and power-down function. At 100-MHz clock frequency, the chip covers a bandwidth from dc to 35 MHz in 0.0233-Hz frequency steps with 190-ns frequency switching speed. The complete chip occupies 12-mm$^2$die area and dissipates 0.4 W at 100-MHz clock frequency.

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1Kbit single-poly EEPROM IC design (1Kbit single-poly EEPROM IC 설계)

  • Jung, In-Seok;Park, Keun-Hyung;Kim, Kuk-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.249-250
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    • 2008
  • In this paper, we propose the single polycrystalline silicon flash EEPROM IC with a new structure which does not need the high voltage switching circuit. The design of high voltage switching circuits which are needed for the data program and erase, has been an obstacle to develop the single-poly EEPROM. Therefore, we has proposed the new cell structure which uses the low voltage switching circuits and has designed the full chip. A new single-poly EEPROM cell is designed and the full chip including the control block, the analog block, row decoder block, and the datapath block is designed. And the each block is verified by using the computer simulation. In addition, the full chip layout is performed.

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A Single-Chip Video/Audio CODEC for Low Bit Rate Application

  • Park, Seong-Mo;Kim, Seong-Min;Kim, Ig-Kyun;Byun, Kyung-Jin;Cha, Jin-Jong;Cho, Han-Jin
    • ETRI Journal
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    • v.22 no.1
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    • pp.20-29
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    • 2000
  • In this paper, we present a design of video and audio single chip encoder/decoder for portable multimedia application. The single-chip called as video audio signal processor (VASP) consists of a video signal processing block and an audio single processing block. This chip has mixed hardware/software architecture to combine performance and flexibility. We designed the chip by partitioning between video and audio block. The video signal processing block was designed to implement hardware solution of pixel input/output, full pixel motion estimation, half pixel motion estimation, discrete cosine transform, quantization, run length coding, host interface, and 16 bits RISC type internal controller. The audio signal processing block is implemented with software solution using a 16 bits fixed point DSP. This chip contains 142,300 gates, 22 Kbits FIFO, 107 kbits SRAM, and 556 kbits ROM, and the chip size is $9.02mm{\times}9.06mm$ which is fabricated using 0.5 micron 3-layer metal CMOS technology.

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Thermo-mechanical Analysis of Filp Chip PBGA Package Using $Moir\acute{e}$ Interferometry (모아레 간섭계를 이용한 Flip Chip PBGA 패키지의 온도변화에 대한 거동해석)

  • Kim, Do-Hyung;Choi, Yong-Seo;Joo, Jin-Won
    • Proceedings of the KSME Conference
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    • 2003.11a
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    • pp.1027-1032
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    • 2003
  • Thermo-mechanical behavior of flip-chip plastic ball grid array (FC-PBGA) packages are characterized by high sensitive $Moir{\acute{e}}$ interferometry. $Moir{\acute{e}}$ fringe patterns are recorded and analyzed for several temperatures. Deformation analysis of bending displacements of the packages and average strains in the solder balls for a single-sided package assembly and a double-sided package assembly are presented. The bending displacement of the double-sided package assembly is smaller than that of the single-sided one. The largest of effective strain occurred in the solder ball located at the edge of the chip and its magnitude of the double-sided package assembly is greater than that of single-sided one.

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8.2-GHz band radar RFICs for an 8 × 8 phased-array FMCW receiver developed with 65-nm CMOS technology

  • Han, Seon-Ho;Koo, Bon-Tae
    • ETRI Journal
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    • v.42 no.6
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    • pp.943-950
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    • 2020
  • We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

DNA Chip using Single Stranded Large Circular DNA: Low Background and Stronger Signal Intensity

  • Park, Jong-Gu
    • Biomedical Science Letters
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    • v.10 no.2
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    • pp.75-84
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    • 2004
  • Massive identification of differentially expressed patterns has been used as a tool to detect genes that are involved in disease related process. We employed circular single stranded sense molecules as probe DNA for a DNA chip. The circular single stranded DNAs derived from 1,152 unigene cDNA clones were purified in a high throughput mode from the culture supernatant of bacterial transformants containing recombinant phagemids and arrayed onto silanized slide glasses. The DNA chip was examined for its utility in detection of differential expression profile by using cDNA hybridization. Hybridization of the single stranded probe DNA were performed with Cy3- or Cy5-labeled target cDNA preparations at $60^\circ$C. Dot scanning performed with the hybridized slide showed 29 up-regulated and 6 down-regulated genes in a cancerous liver tissue when compared to those of adjacent noncancerous liver tissue. These results indicate that the circular single stranded sense molecules can be employed as probe DNA of arrays in order to obtain a precious panel of differentially expressed genes.

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Analysis of Chip-Tool Friction and Shear Characteristics in 3-D Cutting Process (3차원 절삭시 칩-공구 마찰 및 전단 특성 해석)

  • Lee, Young-Moon;Choi, Won-Sik;Song, Tae-Seong;Park, Tae-Joon;Jang, Eun-Sil
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.6
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    • pp.190-196
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    • 1999
  • In this study, a procedure for analyzing chip-tool friction and shear processes in 3-D cutting with a single point tool has been established. The edge of a single point tool including circular nose is modified to the equivalent straight edge, then 3-D cutting with a single point tool is reduced to equivalent oblique cutting. Transforming the conventional coordinate systems and using the measured three component of cutting forces, force components on the rake face and the shear plane of the equivalent oblique cutting system can be obtained. And it can be possible to assess the chip-tool friction and shear characteristics in 3-D cutting with a single point tool.

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