• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.143-144
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• 2008

Single crystal $ZnIn_2S_4$ layers were grown on a thoroughly etched semi-insulating GaAs(100) substrate at $450^{\circ}C$ with the hot wall epitaxy (HWE) system by evaporating the polycrystal source of $ZnIn_2S_4$ at $610^{\circ}C$ prepared from horizontal electric furnace. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). The carrier density and mobility of single crystal $ZnIn_2S_4$ thin films measured with Hall effect by van der Pauw method are $8.51\times10^{17}$ electron/$cm^{-3}$, 291 $cm^2$/v-s at 293 K, respectively.

• Journal of International Academy of Physical Therapy Research
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• v.10 no.2
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• pp.1774-1778
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• 2019

Background : Methods of wearing a baby carrier have suggested; however, there have been no studies suggesting ideal ways. Objective : To investigate muscular fatigue and balance of the waist during baby carrier are worn on the front, the side, and the back of the body. Design: Randomized controlled clinical trial (single blind) Methods : The subjects of this study were 20 healthy men and women in their 20s, who underwent tests of muscular fatigue and balance of the waist bones based on types of wearing baby carrier. Electromyogram (EMG) patches were attached to the L2 and the L4 for testing muscular fatigue, while a device for measuring proprioceptive senses was used to assess balance ability. The measurements were performed before wearing the baby carrier and after 30 minutes of normal walking. The methods of wearing the baby carrier included wearing on the front, the side, and the back of the body. Results : The time taken to adjust the balance was shorter than other types of wearing during the baby carrier were worn on the side, and the ratio of lumbar flexion and relaxation was shown insignificant. Conclusions : These results suggested that wearing the carriers on the side was most effective on reducing fatigue and enhancing balance ability of the waist.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.3
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• pp.292-298
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• 2003

Most of the three phase inverters for adjustable speed drive of AC machines are equipped with two or three current sensors for measurement of three phase current. One method to reduce the number of current sensors is that single current sensor measures the DC link current, then three phase current is reconstructed using the measured value and the switching status. To improve the measurement accuracy, switching state should be maintained for more than minimum switching time. Many papers have been published, which focused on the readjustment of pulse width and compensation of voltage distortion. Those methods are suitable for space vector modulation. But there are some difficulties in applying these methods to carrier-based PWM which is widely used in industry. In this paper, new current measurement method and voltage compensation method are proposed which are suitable for carrier-based PWM, then, the validity of proposed method is confirmed through experiment.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.50-52
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• 2006

본 논문은 고성능 다결정 실리콘(Poly-Si) 박막 트랜지스터 (Thin Film Transistor)에서 단일 수직 그레인 경계(Single Perpendlcular Grain Boundary)가 고온 캐리어 스트레스(Hot Carrier Stress) 및 정전류 안정성 평가에서 어떠한 효과를 보이는가에 대해서 살펴보았다. 고온 캐리어 스트레스 하에서($V_G=V_{TH}+1V,\;V_D$ =12V),그레이 경계가 없는 다결정 실리콘 TFT와 비교했을 때 그레인 경계를 가지고 있는 다결정 실리를 TFT는 전기 전도(Electric Conduction)에 작용하는 자유 캐리어(Free Carrier)의 개수가 적기 때문에 상대적으로 더욱 우수한 전기적 특성을 나타낸다. 먼저 1000초 동안 고온 캐리어 스트레스를 가해준 결과 단일 그레인 경계를 가진 다결정 실리콘에서의 트랜스 컨덕턴스(Transconductance)의 이동 정도는 5% 미만으로 확인되었다. 반면에 같은 스트레스 조건 하에서 그레인 경계가 존재하지 않는 다결정 실리콘의 경우에는 그 이동 정도가 약 25%에 달하는 것으로 측정되었다. 다음으로 정전류 스트레스(Constant Current Stress) 인가시, 수직형 그레인 경계가 채널 영역 내에 존재하지 않는 다결정 실리콘 TFT는 드레인 접합 부분의 전계 세기를 비교했을 때, 그레인 경계를 가지고 있는 다결정 실리콘 TFT보다 상대적으로 낮은 원 인 때문에 적게 열화되는(Degraded) 특성을 확인할 수 있었다.

• Journal of Power System Engineering
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• v.9 no.2
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• pp.106-111
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• 2005

After many casualties of conventional bulk carriers in recent years, a double hull bulk carrier was proposed to enhance the structural safety of a side shell and a transverse bulkhead. In this paper, two alternative structural designs of a double hull bulk carrier were carried out based on the Lloyd's rule. One has the double sided hull with longitudinal stiffeners and the other has that with a girder. The final structural design was examined in comparison with an existing single hull bulk carrier from the viewpoints of cargo hold capacity and the increases of weight and construction cost. Generally, the construction cost of a ship consists of the costs of material, labor and overhead cost. But, in this study, the relative construction cost concept was introduced to compare the economical validity more precisely. In this concept, fixed overhead cost is excluded in the assessment of construction cost, and only the variable overhead cost is added up to labor cost. As the result of this study, a double hull bulk carrier can be constructed within 1% increase of weight and construction cost.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.39-45
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• 1997

This study presents the first experimental data for the impact of hot-carrier degradtion on the performance of CMOS folded-cascode op-amps. A folded-cascode op-amp which has an NMOS input pair has been designed and fabricated using a 0.8.mu.m single-poly, double-metal CMOS process. After high voltage stress, the degradtion of perfomrance parameters such as open-metal CMOS process. After high voltage stress, the degradation of performance parameters such as open-loop voltage gain, unity-gain frequency and phase margin has been analized and physically explaniend in terms of hot carrier degradation.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.53-53
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• 2010

Graphene comes into the spotlight as an emergent device material on account of its high carrier mobility reflecting its massless Dirac fermion behavior. Chemical technique to control reversibly the carrier concentration of semiconducting graphene for the achievement of a large-area graphene device has been strongly required. Here we show that the adsorptions of a metal and a molecule can manipulate the carrier concentration of single-layer graphene, epitaxially grown on SiC, which was directly observed using angle-resolve photoemission spectroscopy. These results will shed light on the researches for the very large scale integration of a graphene device. Furthermore, the carrier concentration changes can be applied to a highly sensitive gas sensor or a detector for an specific binding between an antigen and an antibody.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.5
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• pp.7-10
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• 1984

Generally, free carrier densities of single crystal semiconductors are indifferent to methods of measurement. Free carrier densities of CdSe thin films, however, were measured invarious values with different methods In this paper, C-V method, Seebeck effect and a.c. Hall effect were used to measure carries densities of CdSe thin films. Carrier densities of CdSe thin films were in the range of 10 - 10 carriers/㎤. And causes of different results were discussed.

• Journal of Power Electronics
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• v.13 no.1
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• pp.86-93
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• 2013

A half-cycle-waveform inversion based three reference modulations seven-level SPWM (TRM-SPWM) scheme with one carrier is proposed in this paper. To keep the same comparison logics for the modulations and carrier during the negative half cycle and the positive one for the modulations, in the negative half cycle of the modulations, the DC offsets related to the amplitude of the carrier are set on the three modulations, respectively. The seven-level SPWM waveform with dead time thereby is implemented with only one Digital Signal Processor (DSP) without any other attached logic circuit. The basis principle of the proposed TRM-SPWM is analyzed in detail, and the frequency spectrums of the conventional and the proposed schemes are derived and compared with each other through simulation. The DSP based implementation is presented and detailed experimental waveforms verify the accuracy and feasibility of the proposed TRM-SPWM scheme.