• Progress in Superconductivity and Cryogenics
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• v.8 no.1
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• pp.26-28
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• 2006

The development technique of digital logic using CMOS device is close reached several limitations These make technical needs that are ultra high speed superconductive systems based on CMOS silicon digital computing technique. Comparing digital logic based on silicon CMOS, the computing technique based on ultra high speed superconductive systems has many advantages which are ultra low power consumption, ultra high operation speed. etc. It is estimated that features like these increasingly improve the possibility of ultra low power and ultra superconductive systems. In this paper digital logics of current CMOS technique and RSFQ superconductive technique are compared with and analyzed.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.637-640
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• 2008

The properties of oriented poly(3-hexylthiophene-2,5-diyl) in field effect transistors (FETs) have been investigated through mechanical stretching process as the original. Silicon-based FETs shown high mobility of $0.02\;cm^2/V$ s after thermal treatment and $0.0092\;cm^2/V$ s at r.t. PET-based FETs were expected to show a similar performance in mobility to that of silicon-based FETs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.241-241
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• 2008

Macrofore formation in silicon and other semiconductors using electrochemical etching processes has been, in the last years, a subject of great attention of both theory and practice. Its first reason of concern is new areas of macropore silicone applications arising from microelectromechanical systems processing (MEMS), membrane techniques, solar cells, sensors, photonic crystals, and new technologies like a silicon-on-nothing (SON) technology. Its formation mechanism with a rich variety of controllable microstructures and their many potential applications have been studied extensively recently. Porous silicon is formed by anodic etching of crystalline silicon in hydrofluoric acid. During the etching process holes are required to enable the dissolution of the silicon anode. For p-type silicon, holes are the majority charge carriers, therefore porous silicon can be formed under the action of a positive bias on the silicon anode. For n-type silicon, holes to dissolve silicon is supplied by illuminating n-type silicon with above-band-gap light which allows sufficient generation of holes. To make a desired three-dimensional nano- or micro-structures, pre-structuring the masked surface in KOH solution to form a periodic array of etch pits before electrochemical etching. Due to enhanced electric field, the holes are efficiently collected at the pore tips for etching. The depletion of holes in the space charge region prevents silicon dissolution at the sidewalls, enabling anisotropic etching for the trenches. This is correct theoretical explanation for n-type Si etching. However, there are a few experimental repors in p-type silicon, while a number of theoretical models have been worked out to explain experimental dependence observed. To perform ordered macrofore formaion for p-type silicon, various kinds of mask patterns to make initial KOH etch pits were used. In order to understand the roles played by the kinds of etching solution in the formation of pillar arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, N-dimethylformamide (DMF), iso-propanol, and mixtures of HF with water on the macrofore structure formation on monocrystalline p-type silicon with a resistivity varying between 10 ~ 0.01 $\Omega$ cm. The etching solution including the iso-propanol produced a best three dimensional pillar structures. The experimental results are discussed on the base of Lehmann's comprehensive model based on SCR width.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.263-267
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• 2002

We are standing at the beginning of the industrialization of flexible thin-film transistor backplanes. An important group of candidates is based on silicon thin films made on metal or plastic foils. The main features of amorphous, nanocrystalline and microcrystalline silicon films for TFTs are summarized, and their compatibility with foil substrate materials is discussed.

• Proceedings of the Optical Society of Korea Conference
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• 2003.02a
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• pp.322-323
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• 2003

Silicon substrate was fabricated by bulk silicon micromachining and it's structure is based on a proof mass suspended by two beam. To monitor the acceleration, dynamic excitation of accelerometer was performed using a shaker. The attached FFPI and suspension beam are bent because support beam move with variation of the proof mass. Thus phase difference detected by the acceleration change. So we can know that resonance frequency of fabricated accelerometer is about 557 Hz and dynamic range was measured from 0 g to 2 g.

• Bulletin of the Korean Chemical Society
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• v.34 no.4
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• pp.1296-1299
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• 2013

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.5 no.1
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• pp.37-43
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• 1995

The proper choice of the solvent is a prerequisite for solution growth of silicon. In the present work, the temperature to dissolve at least 1 atomic% silicon was calculated in various molten solvents.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.497-502
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• 1998

To understand the effect of surface roughness on silicon wafer bonding, a continuum mechanical model is presented. This model is based on Obreimoff's experiment and the contact theory of rough surfaces. The surface energy of silicon was calculated to be much reduced than the theoretical value. Problems are discussed concerning surface film effects and the assumption of constant asperity radius and statistical distribution function.

• Applied Chemistry for Engineering
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• v.16 no.5
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• pp.614-619
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• 2005

The water-soluble defoamers were fabricated by the mixing polyol, modified silicon resin, silicon resin and surfactant. For the defoamers, the various properties such as phase-separation time, viscosity and defoamerability were examined. The phase-saparation time of PPG mixtures was found to be PPG 400>PPG 3,000>PPG 1000. When PPG 1000 was mixed, mixtures represented the excellent defoamerability. The phase-saparation time of silicon resin mixtures was TSF-451-350>TSF-451-200>TSF-451-50. As more of high molecular silicon resin was mixed, the resulting mixtues showed reduced defoamerability. When the TSF-451-50 was mixed, the mixture's volume was increased because of the reduction of solubility. The modified silicon resin was smoothly dispersed in water, but the compatibility with PPG was not good. The defoamerability of surfactant was SPAN 20>SPAN 60>SPAN 80. SPAN 80 showed good miscibility for the silicon resin, but not good for YAS 6406 or PPG 1000.

• Journal of Sensor Science and Technology
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• v.20 no.3
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• pp.213-218
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• 2011

The load cell is a force sensor and a transducer that is used to convert a physical force into a electrical signal for weighing equipment. Most conventional load cells are widely used a metal foil strain gauge for sensing element when force being applied spring element in order to converts the deformation to electrical signals. The sensitivity of a load cell is limited by its low gauge factor, hysteresis and creep. But silicon-based sensors perform with higher reliability. This paper presents the basic design and development of the silicon type load cell with an SUS630 diaphragm. The load cell consists of two parts the silicon strain gauge and the SUS630 structure with diaphragm. Structure analysis of load cell was researched by theory to optimize the load cell diaphragm design and to determine the position of peizoresistors on a silicon strain gauge. The piezo-resistors are integrated in the four points of silicon strain gauge processed by ion implantation. The thickness of the silicon strain gauge was polished by CMP under 100 ${\mu}M$. The 10 mm diameter SUS630 diaphragm was designed for loads up to 10 kg with 300 ${\mu}M$ of diaphragm thickness. The load cell was successfully tested, the variation of ${\Delta}$R(%) of four points on the silicon strain gauge is good linearity properties and sensitivity.