• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2007년도 춘계학술발표회 초록집
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• pp.111-113
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• 2007

Thermal conductivities of copper thin films on silicon wafer was obtained from temperature distribution on the surface of wafer measured by radiation thermometry, when sample was heated with constant temperature ate the both ends in a vacuum and dissipate heat by radiation heat transfer into an environment.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1991년도 추계학술대회 논문집
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• pp.63-67
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• 1991

Amorphous silicon films were deposited on glass, [100] single crystal silicon wafer with thermally grown silicon dioxide, and [100] silicon wafer substrates by Plasma Enhanced Chemical Vapor Deposition(with argon diluted silane source gas). Growth rate, UV optical band edge, and the hydrogen quantity in the amorphous silicon films have been investigated as a function of the preparation conditions by measuring film thickness, UV-absorbency, and FT-IR transmittance. The growth rate of the ${\alpha}$-Si:H films increases with increasing substrate temperture, flow rate and R.F. power density. The UV optical band edge shifts to blue with the increases in the deposition pressure. Increasing substrate temperature shifts the UV optical band edge of the films to red. Hydrogen quantity in the ${\alpha}$-Si:H films increases with an increases in the R.F. powr and decreases with an increase in the substrate temperature.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권2호
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• pp.62-66
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• 2004

This paper investigated the characteristics of a newly developed high density hollow cathode plasma (HCP) system and its application for the etching of silicon wafers. We used SF$_{6}$ and $O_2$ gases in the HCP dry etch process. Silicon etch rate of $0.5\mu\textrm{m}$/min was achieved with $SF_6$$O_2$plasma conditions having a total gas pressure of 50mTorr, and RF power of 100 W. This paper presents surface etching characteristics on a crystalline silicon wafer and large area cast type multicrystlline silicon wafer. The results of this experiment can be used for various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications.s.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.662-666
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• 1989

Pure mono Silane(Purity: 99.99%) was used as a thin film source and [$SiH_4$ + $H_2$ (5%)] + [$PH_3$ + $H_2$(0.05%)] mixed dilute gas was used for p-n junction diode. The substrate was P-type silicon wafer (p=$3{\Omega}$ cm) with the direction (100). The crystalline qualities of deposited thin film were investigated by the X-ray diffraction, RHEED and TED patterns and the voltampere characteristics of p-n junction diode was identified by I-V curve.

• 한국전기전자재료학회논문지
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• 제11권12호
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• pp.1115-1121
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• 1998

MLS capacitor with lipid ultra thin films were deposited by Langmuir-Blodgett (LB) method on the silicon wafer. The current versus voltage and capacitance versus voltage relationships are depend on the applied voltage, electrode area and electrode materials. LB films deposited were made of L-$\alhpa$-DLPC, the 1 layer’s thickness of 35${\AA}$ was measured by ellipsometer. And MLS capacitor with different electrode materials, the work function of these materials was investigated to increase the leakage current. The result indicated the lower leakage current and very high saturation value of capacitance was reached within 700-800 pF when the two electrode was Ag. And $\varepsilon$1, $\varepsilon$2 versus photon energy showed good film formation.

• 전자통신동향분석
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• 제5권1호
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• pp.55-70
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• 1990

SIMOX SOI is known to be one of the most useful technologies for fabrications of new generation ULSI devices. This paper describes the current status of SIMOX SOI technology for ULSI applications. The SIMOX wafer is vertically composed of buried oxide layer and silicon epitaxial layer on top of the silicon substrate. The buried oxide layer is used for the vertical isolation of devices The oxide layer is formed by high energy ion implantation of high dose oxygen into the silicon wafer, followed by high temperature annealing. SIMOX-based CMOS fabrication is transparent to the conventional IC processing steps without well formation. Furthermore, thin film CMOX/SIMOX can overcome the technological limitations which encountered in submicron bulk-based CMOS devices, i.e., soft-error rate, subthreshold slope, threshold voltage roll-off, and hot electron degradation can be improved. SIMOX-based bipolar devices are expected to have high density which comparable to the CMOX circuits. Radiation hardness properties of SIMOX SOI extend its application fields to space and military devices, since military ICs should be operational in radiation-hardened and harsh environments. The cost of SIMOX wafer preparation is high at present, but it is expected to reduce as volume increases. Recent studies about SIMOX SOI technology have demonstrated that the performance of the SIMOX-based submicron devices is superior to the circuits using the bulk silicon.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 추계학술대회
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• pp.1448-1452
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• 2003

A scratch tester was developed to evaluate the adhesive strength at interface between thin-film and substrate(silicon wafer). Under force control, the scratch tester can measure the normal and the tangential forces simultaneously as the probe tip of the equipment approaches to the interface between thin-film and substrate of wafer. The capacity of each component of force sensor is 0.1 N ${\sim}$ 100 N. In addition, the tester can detect the signal of elastic wave from AE sensor(frequency range of 900 kHz) attached to the probe tip and evaluate the bonding strength of interface. Using the developed scratch tester, the feasibility test was performed to evaluate the adhesive strength of thin-film.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1998년도 제16회 학술발표회 논문개요집
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• pp.93-93
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• 1998

• 한국전기전자재료학회논문지
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• 제15권12호
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• pp.1039-1044
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• 2002

Film Bulk Acoustic Resonator (FBAR) using thin piezoelectric films can be made as monolithic integrated devices with compatibility to semiconductor process, leading to small size, low cost and high Q RF circuit elements with wide applications in communications area. This paper presents an MMIC compatible suspended FBAR using SOI micromachining. It is possible to make a single crystal silicon membrane using a SOI wafer In fabricating active devices, SOI wafer offers advantage which removes the substrate loss. FBAR was made on the 12㎛ silicon membrane. Electrode and Piezoelectric materials were deposited by RF magnetron sputter. The maximum resonance frequency of FBAR was shown at 2.5GHz range. The reflection loss, K$^2$$\_$eff/, Q$\_$serise/ and Q$\_$parallel/ in that frequency were 1.5dB, 2.29%, 220 and 160, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.332-333
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• 2008

DC magnetron sputtering was used to deposit p-type polycrystalline silicon on n-type Si(100) wafer. The influence of film microstructure properties on deposition parameters (DC power, substrate temperature, pressure) was investigated. The substrate temperature and pressure have the important influence on depositing the poly-Si thin films. Smooth ploy-Si films were obtained in (331) orientation and the average grain sizes are ranged in 25-30nm. The grain sizes of films deposited at low pressure of 10mTorr are a little larger than those deposited at high pressure of 15mTorr.