• Title/Summary/Keyword: Silicon substrate

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A effect of the back contact silicon solar cell with surface texturing size and density (표면 텍스쳐링 크기와 밀도가 후면 전극 실리콘 태양전지에 미치는 영향)

  • Jang, Wanggeun;Jang, Yunseok;Pak, Jungho
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.112.1-112.1
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    • 2011
  • The back contact solar cell (BCSC) has several advantages compared to the conventional solar cell since it can reduce grid shadowing loss and contact resistance between the electrode and the silicon substrate. This paper presents the effect of the surface texturing of the silicon BCSC by varying the texturing depth or the texturing gap in the commercially available simulation software, ATHENA and ATLAS of the company SILVACO. The texturing depth was varied from $5{\mu}m$ to $150{\mu}m$ and the texturing gap was varied from $1{\mu}m$ to $100{\mu}m$ in the simulation. The resulting efficiency of the silicon BCSC was evaluated depending on the texturing condition. The quantum efficiency and the I-V curve of the designed silicon BCSC was also obtained for the analysis since they are closely related with the solar cell efficiency. Other parameters of the simulated silicon BCSC are as follows. The substrate was an n-type silicon, which was doped with phosphorous at $6{\times}10^{15}cm^{-3}$, and its thickness was $180{\mu}m$, a typical thickness of commercial solar cell substrate thickness. The back surface field (BSF) was $1{\times}10^{20}\;cm^{-3}$ and the doping concentration of a boron doped emitter was $8.5{\times}10^{19}\;cm^{-3}$. The pitch of the silicon BCSC was $1250{\mu}m$ and the anti-reflection coating (ARC) SiN thickness was $0.079{\mu}m$. It was assumed that the texturing was anisotropic etching of crystalline silicon, resulting in texturing angle of 54.7 degrees. The best efficiency was 25.6264% when texturing depth was $50{\mu}m$ with zero texturing gap in case of low texturing depth (< $100{\mu}m$).

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The Effect of Barrier Layer on Thin-film Silicon Solar Cell Using Graphite Substrates (탄소 기판을 이용한 박막 실리콘 태양전지의 배리어 층 효과)

  • Cho, Young Joon;Lee, Dong Won;Cho, Jun Sik;Chang, Hyo Sik
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.8
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    • pp.505-509
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    • 2016
  • We have investigated the characteristics of amorphous silicon (a-Si) thin-film solar cell by inserting barrier layer. The conversion efficiency of a-Si thin-film solar cells on graphite substrate shows nearly zero because of the surface roughness of the graphite substrate. To enhance the performance of solar cells, the surface morphology of the back side were modified by changing the barrier layer on graphite. The surface roughness of graphite substrate with the barrier layer grown by plasma enhanced chemical vapor deposition (PECVD) reduced from ~2 um to ~75 nm. In this study, the combination of the barrier layer on graphite substrate is important to increase solar cell efficiency. We achieved ~ 7.8% cell efficiency for an a-Si thin-film solar cell on graphite substrate with SiNx/SiOx stack barrier layer.

A Study of Thermo-Mechanical Behavior and Its Simulation of Silicon Nitride Substrate on EV (Electronic Vehicle)'s Power Module (전기자동차 파워모듈용 질화규소 기판의 열기계적 특성 및 열응력 해석에 대한 연구)

  • Seo, Won;Jung, Cheong-Ha;Ko, Jae-Woong;Kim, Gu-Sung
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.4
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    • pp.149-153
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    • 2019
  • The technology of electronic packaging among semiconductor technologies is evolving as an axis of the market in its own field beyond the simple assembly process of the past. In the field of electronic packaging technology, the packaging of power modules plays an important role for green electric vehicles. In this power module packaging, the thermal reliability is an important factor, and silicon nitride plays an important part of package substrates, Silicon nitride is a compound that is not found in nature and is made by chemical reaction between silicon and nitrogen. In this study, this core material, silicon nitride, was fabricated by reaction bonded silicon nitride. The fabricated silicon nitride was studied for thermo-mechanical properties, and through this, the structure of power module packaging was made using reaction bonded silicon nitride. And the characteristics of stress were evaluated using finite element analysis conditions. Through this, it was confirmed that reaction bonded silicon nitride could replace the silicon nitride as a package substrate.

Optimum Substrate Temperature for Hydrogenated Amorphous Silicon $n^+-p-p^+$ Cells (수소화된 비정질 실리콘 $n^+-p-p^+$ 태양전지에서 최적기판온도의 결정)

  • Lee, Yi-Sang;Jang, Jin
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.509-512
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    • 1987
  • We report that the optimum substrate temperature to fabricate a-Si:H $n^+-p-p^+$ cell decreases with increasing the boron concentration in the Player. The results can be explained as the dependence of substrate temperature for the relaxation of silicon atoms and the bonded hydrogen concentration in the player.

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Fabrication and Characteristics of MMIC Substrate using Oxidation of Porous Silicon (다공질 실리콘 산화법을 이용한 MMIC 기판의 제조 및 그 특성)

  • Kwon, O.J.;Kim, K.J.;Lee, J.S.;Lee, J.H.;Choi, H.C.;Lee, J.H.;Kim, K.W.
    • Journal of Sensor Science and Technology
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    • v.8 no.2
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    • pp.202-209
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    • 1999
  • Microstrip line was fabricated on the oxidized porous silicon layer which has nearly electrically and chemically identical properties with thermally oxidized silicon layer. Thick oxidized porous silicon layer of few tenth of micrometers was prepared by thermal oxidation of porous silicon layer on silicon substrate. Multi-step thermal oxidation process was used to obtain high Quality and thick oxidized silicon layer and to release thermal stress. Microstrip line was fabricated on the oxidized porous silicon layer. Its microwave characteristics were measured and the availability for MMIC substrate was investigated.

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Transmission Line Parameter Extraction and Signal Integrity Verification of VLSI Interconnects Under Silicon Substrate Effect (실리콘 기판 효과를 고려한 VLSI 인터컨넥트의 전송선 파라미터 추출 및 시그널 인테그러티 검증)

  • 유한종;어영선
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.3
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    • pp.26-34
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    • 1999
  • A new silicon-based IC interconnect transmission line parameter extraction methodology is presented and experimentally examined. Unlike the PCB or MCM interconnects, a dominant energy propagation mode in the silicon-based IC interconnects is not quasi-TEM but slow wave mode(SWM). The transmission line parameters are extracted taking the silicon substrate effect (i.e., slow wave mode) into account. The capacitances are calculated considering silicon substrate surface as a ground. Whereas the inductances are calculated by using an effective dielectric constant. In order to verify the proposed method, test patterns were designed. Experimental data have agreement within 10%. Further, crosstalk noise simulation shows excellent agreements with the measurements which are performed with high-speed time domain measurement ( i.e., TDR/TDT measurements) for test pattern, while RC model or RLC model without silicon substrate effect show about 20~25% underestimation error.

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Nano-thick Nickel Silicide and Polycrystalline Silicon on Polyimide Substrate with Extremely Low Temperature Catalytic CVD (폴리이미드 기판에 극저온 Catalytic-CVD로 제조된 니켈실리사이드와 실리콘 나노박막)

  • Song, Ohsung;Choi, Yongyoon;Han, Jungjo;Kim, Gunil
    • Korean Journal of Metals and Materials
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    • v.49 no.4
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    • pp.321-328
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    • 2011
  • The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

On the silicon nitride film formation and characteristic study by chemical vapor deposition method using electron cyclotron resonance plasma (전자 싸이클로트론 공명 플라즈마 화학 증착법에 의한 실리콘 질화막 형성 및 특성 연구)

  • 김용진;김정형;송선규;장홍영
    • Journal of the Korean institute of surface engineering
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    • v.25 no.6
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    • pp.287-292
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    • 1992
  • Silicon nitride thin film (SiNx) was deposited onto the 3inch silicon wafer using an electron cyclotron resonance (ECR) plasma apparatus. The thin films which were deposited by changing the SiH4N2 gas flow rate ratio at 1.5mTorr without substrate heating were analyzed through the x-ray photo spectroscopy (XPS) and ellipsometer measurements, etc. Silicon nitride thin films prepared by the electron cyclotron resonance plasma chemical vapor deposition method at low substrate temperature (<10$0^{\circ}C$) exhibited excellent physical and electrical properties. The very uniform and good quality silicon nitride thin films were obtained. The characteristics of electron cyclotron resonance plasma were inferred from the analyzed results of the deposited films.

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Phophorus External Gettering for High Quality Wafer of Silicon Heterojunction Solar Cells

  • Park, Hyo-Min;Tak, Seong-Ju;Kim, Chan-Seok;Park, Seong-Eun;Kim, Yeong-Do;Kim, Dong-Hwan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.43.2-43.2
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    • 2011
  • Minority Carrier recombination should be suppressed for high efficiency solar cells. However, impurities in the silicon bulk region deteriorate the minority carrier lifetimes, causes conversion efficiency drop. In this study, we introduced phosphorus external gettering for silicon heterojunction solar cell substrates. Gettering was undergone at 750, 800, 850 and $900^{\circ}C$ in furnace for 30 minutes. Bulk lifetimes and calculated diffusion length were improved. We applied phosphorus gettering to silicon heterojunction solar cells. Gettered group and ungettered group were used as substrate of silicon heterojunction solar cells. After fabrication, characteristics of solar cells were analyzed. The results were observed to see the enhancement of substrate quality which directly connects with solar cell properties.

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Solid-Phase crystallization of amorphous silicon films deposited by plasma-enhanced chemical vapor deposition

  • Lee, Jung-Keun
    • Journal of Korean Vacuum Science & Technology
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    • v.2 no.1
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    • pp.49-54
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    • 1998
  • The effect of deposition paratmeters on the solid-phase crystallization of amorphous silicon films deposited by plasma-enhanced chemical vapor deposition has been investigated by x-ray diffraction. The amorphous silicon films were prepared on Si(100) wafers using SiH4 gas with and without H2 dilution at the substrate temperatures between 12$^{\circ}C$ and 38$0^{\circ}C$. The R. F. powers and the deposition pressures were also varied. After crystallizing at $600^{\circ}C$ for 24h, the films exhibited (111), (220), and (311) x-ray diffraction peaks. The (111) peak intensity increased as the substrate temperature decreased, and the H dilution suppressed the crystallization. Increasing R.F. powers within the limits of etching level and increasing deposition pressures also have enhanced the peak intensity. The peak intensity was closely related to the deposition rate, which may be an indirect indicator of structural disorder in amorphous silicon films. Our results are consistent with the fact that an increase of the structural disorder I amorphous silicon films enhances the grain size in the crystallized films.