• Title/Summary/Keyword: Silicon oxide substrate

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Influence of Surface Texturing on the Electrical and Optical Properties of Aluminum Doped Zinc Oxide Thin Films

  • Lee, Jaeh-Yeong;Shim, Joong-Pyo;Jung, Hak-Kee
    • Journal of information and communication convergence engineering
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    • v.9 no.4
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    • pp.461-465
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    • 2011
  • An aluminum doped zinc oxide (AZO) film for front contacts of thin film solar cells, in this work, were deposited by r.f. magnetron sputtering, and then etched in diluted hydrochloric acid solution for different times. Effects of surface texturing on the electro-optical properties of AZO films were investigated. Also, to clarify the light trapping of textured AZO film, amorphous silicon thin film solar cells were fabricated on the textured AZO/glass substrate and the performance of solar cells were studied. After texturing, the spectral haze at the visible range of 400 ~750 nm increased substantially with the etching time, without a change in the resistivity. The conversion efficiency of amorphous Si solar cells with textured AZO film as a front electrode was improved by the increase of short-circuit current density ($J_{sc}$), compared to cell with flat AZO films.

Plasmonic gold nanodot array optimization on a-Si thin film solar cells using anodic aluminum oxide templates (비정질 실리콘 박막 태양전지 효율 향상을 위한 양극산화 알루미늄 템플레이트을 이용한 플라즈모닉 금 나노점 배열 최적화)

  • Bae, Kyuyoung;Kim, Kyoungsik
    • Transactions of the Society of Information Storage Systems
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    • v.9 no.2
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    • pp.67-71
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    • 2013
  • The fabrication method of plasmonic nanodots on silicon substrate has been developed to improve the efficiency of thin film solar cells. Nanoscale metallic nanodots arrays are fabricated by anodic aluminum oxide (AAO) template mask which can have different structural parameters by varying anodization conditions. In this paper, the structural parameters of gold nanodots, which can be controlled by the diverse structures of AAO template mask, are investigated to enhance the optical properties of a-Si thin film solar cells. It is found that optical properties of the thin film solar cells are improved by finding optimization values of the structural parameters of the gold nanodot array.

Photoresponse Properties of Reduced Graphene Oxide/n-silicon Heterojunction Fabricated by the Vacuum Filtration and Transfer Method

  • Du, Yonggang;Qiao, Liangxin;Xue, Dingyuan;Jia, Yulei
    • Current Optics and Photonics
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    • v.6 no.4
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    • pp.367-374
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    • 2022
  • A photodetector based on a reduced graphene oxide (RGO)/n-Si heterojunction with high responsivity, detectivity and fast response speed is presented. Here, we put forward a simple vacuum filtration method to prepare RGO film and transfer it onto an n-Si substrate to form an RGO/n-Si heterojunction. The experimental results show that the heterojunction has good rectification characteristics, and the response and recovery time are less than 0.31 s and 0.25 s, respectively. Under 470 nm light conditions at -2 V applied voltage, the responsivity and detectivity of the device are 65 mA/W and 4.02 × 1010 cmHz1/2W-1, respectively. The simple preparation process and good performance of the RGO/n-Si heterojunction make it a promising material for photoelectric detection, especially in the near-ultraviolet band.

Oxide Layer Growth in High-Pressure Steam Oxidation (고압 수증기 내에서 산화막 형성에 관한 연구)

  • 박경희;안순의;구경완;왕진석
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.735-738
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    • 2000
  • This paper shows experimentally that oxide layer on the p-type Si-substrate can grow at low temperature(500$^{\circ}C$∼600$^{\circ}C$) using high pressure water vapor system. As the result of experiment, oxide layer growth rate is about 0.19${\AA}$/min at 500$^{\circ}C$, 0.43${\AA}$/min at 550$^{\circ}C$, 1.2${\AA}$/min at 600$^{\circ}C$ respectively. So, we know oxide layer growth follows reaction-controlled mechanism in given temperature range. Consequently, granting that oxide layer growth rate increases linearly to temperature over 600$^{\circ}C$, we can expect oxide growth rate is 5.2${\AA}$/min at 1000$^{\circ}C$. High pressure oxidation of silicon is particularly attractive for the thick oxidation of power MOSFET, because thermal oxide layers can grow at relatively low temperature in run times comparable to typical high-temperature, 1 atm conditions. For higher-temperature, high-pressure oxidation, the oxidation time is reduced significantly

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Effect of Solar Cell Cover Glass on Solar Cell Performance (태양전지 보호유리가 태양전지 성능에 미치는 영향)

  • Choi, Young-Jin;Wang, Jin-Suk
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1421-1423
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    • 1996
  • In this study, the effect of solar cell cover glass on the solar cell performance is evaluated. Silicon solar cell (active area:4*6cm, efficiency:12.6% at AMO condition) is used for this study. ITO(Indium tin Oxide) film thickness of the ITO/AR/substrate glass/solar cell structure samples are $40{\AA}$, $60{\AA}$, $160{\AA}$, $240{\AA}$ respectively. The solar cell maximum output power on the stacking structure variations showed 465mW in the AR/ITO/substrate glass/solar cell, and minimum output power showed 403mW in the AR/substrate glass/solar cell. The maximum output power of the solar cell on the ITO thickness variations of the ITO/AR/substrate glass/solar cell showed 460mW at $40{\AA}$ then decrease output power as ITO thickness increase. For environment tests, all samples are exposed UV light in the vacuum chanber. The output power degradation of AR(UVR)/substrate glass/solar cell stacking structure is small compared with ITO/AR(UVR)/substrate glass/solar cell stacking structure.

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Vertically Standing Graphene on Glass Substrate by PECVD

  • Ma, Yifei;Hwang, Wontae;Jang, Haegyu;Chae, Heeyeop
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.232.2-232.2
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    • 2014
  • Since its discovery in 2004, graphene, a sp2-hybridized 2-Dimension carbon material, has drawn enormous attention. A variety of approaches have been attempted, such as epitaxial growth from silicon carbide, chemical reduction of graphene oxide and CVD. Among these approaches, the CVD process takes great attention due to its guarantee of high quality and large scale with high yield on various transition metals. After synthesis of graphene on metal substrate, the subsequent transfer process is needed to transfer graphene onto various target substrates, such as bubbling transfer, renewable epoxy transfer and wet etching transfer. However, those transfer processes are hard to control and inevitably induce defects to graphene film. Especially for wet etching transfer, the metal substrate is totally etched away, which is horrendous resources wasting, time consuming, and unsuitable for industry production. Thus, our group develops one-step process to directly grow graphene on glass substrate in plasma enhanced chemical vapor deposition (PECVD). Copper foil is used as catalyst to enhance the growth of graphene, as well as a temperature shield to provide relatively low temperature to glass substrate. The effect of growth time is reported that longer growth time will provide lower sheet resistance and higher VSG flakes. The VSG with conductivity of $800{\Omega}/sq$ and thickness of 270 nm grown on glass substrate can be obtained under 12 min growing time. The morphology is clearly showed by SEM image and Raman spectra that VSG film is composed of base layer of amorphous carbon and vertically arranged graphene flakes.

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Analysis Trap and Device Characteristic of Silicon-Al2O3-Nitride-Oxide-Silicon Memory Cell Transistors using Charge Pumping Method (Charge Pumping Method를 이용한 Silicon-Al2O3-Nitride-Oxide-Silicon Flash Memory Cell Transistor의 트랩과 소자)

  • Park, Sung-Soo;Choi, Won-Ho;Han, In-Shik;Na, Min-Gi;Lee, Ga-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.37-43
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    • 2008
  • In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program/erase (P/E) speed, reliability of memory device on interface trap between Si substrate and tunneling oxide and bulk trap in nitride layer were investigated using charge pumping method which has advantage of simple and versatile technique. We analyzed different SANOS memory devices that were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SANOS cell transistors with larger capture cross section and interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. The data retention was deteriorated as increasing P/E cycling number but not coincides with interface trap increasing tendency. This result once again confirmed that interface trap independence on data retention. And the result on different program method shows that HCI program method more degraded by locally trapping. So, we know as a result of experiment that analysis the SANOS Flash memory characteristic using charge pumping method reflect the device performance related to interface and bulk trap.

Preparation of the SiO2 Films with Low-Dit by Low Temperature Oxidation Process (저온 산화공정에 의해 낮은 Dit를 갖는 실리콘 산화막의 제조)

  • Jeon, Bup-Ju;Jung, Il-Hyun
    • Applied Chemistry for Engineering
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    • v.9 no.7
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    • pp.990-997
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    • 1998
  • In this work, the $SiO_2$ films on the silicon substrate with different orientations were first prepared by the low temperature process using the ECR plasma diffusion as a function of microwave power and oxidation time. Before and after thermal treatment, the surface morphology, Si/O ratio from physicochemical properties, and the electrical properties of the oxide films were also investigated. The oxidation rate increased with microwave power, while surface morphology showed the nonuniform due to etching. The film quality, therefore, was lowered with increasing the defect by etching and the content of positive oxide ions in the oxide films from bulk by higher self-DC bias. The content of positive oxide ions in the oxide films with different Si orientations showed Si(100) < Si(111) < poly Si. The defects in $Si/SiO_2$ interface of $SiO_2$ film could be decreased by annealing, while $Q_{it}$ and $Q_f$ were independent of thermal treatment and the dependent on concentration of reactive oxide ions and self-DC bias of substrate. At microwave power of 300, and 400 W, the high quality $SiO_2$ film that had lower surface roughness and defect in $Si/SiO_2$ interface was obtained. The value of interface trap density, then, was ${\sim}9{\times}10^{10}cm^{-2}eV^{-1}$.

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Technical Trends of Semiconductors for Harsh Environments (극한 환경용 반도체 기술 동향)

  • Chang, W.;Mun, J.K.;Lee, H.S.;Lim, J.W.;Baek, Y.S.
    • Electronics and Telecommunications Trends
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    • v.33 no.6
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    • pp.12-23
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    • 2018
  • In this paper, we review the technical trends of diamond and gallium oxide ($Ga_2O_3$) semiconductor technologies among ultra-wide bandgap semiconductor technologies for harsh environments. Diamond exhibits some of the most extreme physical properties such as a wide bandgap, high breakdown field, high electron mobility, and high thermal conductivity, yet its practical use in harsh environments has been limited owing to its scarcity, expense, and small-sized substrate. In addition, the difficulty of n-type doping through ion implantation into diamond is an obstacle to the normally-off operation of transistors. $Ga_2O_3$ also has material properties such as a wide bandgap, high breakdown field, and high working temperature superior to that of silicon, gallium arsenide, gallium nitride, silicon carbide, and so on. In addition, $Ga_2O_3$ bulk crystal growth has developed dramatically. Although the bulk growth is still relatively immature, a 2-inch substrate can already be purchased, whereas 4- and 6-inch substrates are currently under development. Owing to the rapid development of $Ga_2O_3$ bulk and epitaxy growth, device results have quickly followed. We look briefly into diamond and $Ga_2O_3$ semiconductor devices and epitaxy results that can be applied to harsh environments.

Effect of hydrogen on the photoluminescence of Silicon nanocrystalline thin films (실리콘 나노결정 박막에서 수소 패시베이션 효과)

  • Jeon, Kyung-Ah;Kim, Jong-Hoon;Kim, Gun-Hee;Lee, Sang-Yeol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.1033-1036
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    • 2004
  • Si nanocrystallites thin films on p-type (100) Si substrate have been fabricated by pulsed laser deposition using a Nd:YAG laser. After deposition, samples were annealed at the temperatures of 400 to $800^{\circ}C$. Hydrogen passivation was then performed in the forming gas (95% $N_2$ + 5% $H_2$) for 1 hr. Strong violet-indigo photoluminescence has been observed at room temperature from nitrogen ambient-annealed Si nanocrystallites. The variation of photoluminescence (PL) Properties of Si nanocrystallites thin films has been investigated depending on annealing temperatures with hydrogen passivation. From the results of PL, Fourier transform infrared (FTIR), and high-resolution transmission electron microscopy (HRTEM) measurements, it is observed that the origin of violet-indigo PL from the nanocrystalline silicon in the silicon oxide film is related to the quantum size effect of Si nanocrystallites and oxygen vacancies in the SiOx(x : 1.6-1.8) matrix affects the emission intensity.

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