• Transactions on Electrical and Electronic Materials
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• 제11권5호
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• pp.234-237
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• 2010

Nanoenergetic materials were synthesized and the thermite reaction between the CuO nanowires and the deposited nano-Al by Joule heating was studied. CuO nanowires were grown by thermal annealing on a glass substrate. To produce nanoenergetic materials, nano-Al was deposited on the top surface of CuO nanowires. The temperature of the first exothermic reaction peak occurred at approximately $600^{\circ}C$. The released heat energy calculated from the first exothermic reaction peak in differential scanning calorimetry, was approximately 1,178 J/g. The combustion of the nanoenergetic materials resulted in a bright flash of light with an adiabatic frame temperature potentially greater than $2,000^{\circ}C$. This thermite reaction might be utilized to achieve a highly reliable selective area crystallization of amorphous silicon films.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권1호
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• pp.1-9
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• 2006

We introduce our in-house program, NANOCAD, for the modeling and simulation of carrier transport in nanoscale MOSFET devices including quantum-mechanical effects, which implements two kinds of modeling approaches: the top-down approach based on the macroscopic quantum correction model and the bottom-up approach based on the microscopic non-equilibrium Green’s function formalism. We briefly review these two approaches and show their applications to the nanoscale bulk MOSFET device and silicon nanowire transistor, respectively.

• 한국재료학회지
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• 제32권8호
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• pp.333-338
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• 2022

In this work, we developed silver nanowires and a silicon based Schottky junction and demonstrated ultrafast broadband photosensing behavior. The current device had a response speed that was ultrafast, with a rising time of 36 ㎲ and a falling time of 382 ㎲, and it had a high level of repeatability across a broad spectrum of wavelengths (λ = 365 to 940 nm). Furthermore, it exhibited excellent responsivity of 60 mA/W and a significant detectivity of 3.5 × 10¹² Jones at a λ = 940 nm with an intensity of 0.2 mW cm^-2 under zero bias operating voltage, which reflects a boost of 50 %, by using the AC PV effect. This excellent broadband performance was caused by the photon-induced alternative photocurrent effect, which changed the way the optoelectronics work. This innovative approach will open a second door to the potential design of a broadband ultrafast device for use in cutting-edge optoelectronics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.418-418
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• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.215-216
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• 2013

The silicide is a compound of Si with an electropositive component. Silicides are commonly used in silicon-based microelectronics to reduce resistivity of gate and local interconnect metallization. The popular silicide candidates, CoSi2 and TiSi2, have some limitations. TiSi2 showed line width dependent sheet resistance and has difficulty in transformation of the C49 phase to the low resistive C54. CoSi2 consumes more Si than TiSi2. Nickel silicide is a promising material to substitute for those silicide materials providing several advantages; low resistivity, lower Si consumption and lower formation temperature. Nickel silicide (NiSi) nanowire (NW) has features of a geometrically tiny size in terms of diameter and significantly long directional length, with an excellent electrical conductivity. According to these advantages, NiSi NWs have been applied to various nanoscale applications, such as interconnects [1,2], field emitters [3], and functional microscopy tips [4]. Beside its tiny geometric feature, NW can provide a large surface area at a fixed volume. This makes the material viable for photovoltaic architecture, allowing it to be used to enhance the light-active region [5]. Additionally, a recent report has suggested that an effective antireflection coating-layer can be made with by NiSi NW arrays [6]. A unique growth mechanism of nickel silicide (NiSi) nanowires (NWs) was thermodynamically investigated. The reaction between Ni and Si primarily determines NiSi phases according to the deposition condition. Optimum growth conditions were found at $375^{\circ}C$ leading long and high-density NiSi NWs. The ignition of NiSi NWs is determined by the grain size due to the nucleation limited silicide reaction. A successive Ni diffusion through a silicide layer was traced from a NW grown sample. Otherwise Ni-rich or Si-rich phase induces a film type growth. This work demonstrates specific existence of NiSi NW growth [7].

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.427-427
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• 2012

Ferroelectric-gate field effect transistor based memory using a nanowire as a conducting channel offers exceptional advantages over conventional memory devices, like small cell size, low-voltage operation, low power consumption, fast programming/erase speed and non-volatility. We successfully fabricated ferroelectric nonvolatile memory devices using both n-type and p-type Si nanowires coated with organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] via a low temperature fabrication process. The devices performance was carefully characterized in terms of their electrical transport, retention time and endurance test. Our p-type Si NW ferroelectric memory devices exhibit excellent memory characteristics with a large modulation in channel conductance between ON and OFF states exceeding $10^5$; long retention time of over $5{\times}10^4$ sec and high endurance of over 105 programming cycles while maintaining ON/OFF ratio higher $10^3$. This result offers a viable way to fabricate a high performance high-density nonvolatile memory device using a low temperature fabrication processing technique, which makes it suitable for flexible electronics.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.288-288
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• 2013

Lithium-ion battery (LIB) is one of the most important rechargeable battery and portable energy storage for the electric digital devices. In particular, study about the higher energy capacity and longer cycle life is intensively studied because of applications in mobile electronics and electric vehicles. Generally, the LIB's capacity can be improved by replacing anode materials with high capacitance. The graphite, common anode materials, has a good cyclability but shows limitations of capacity (~374 mAh/g). On the contrary, silicon (Si) and germanium(Ge), which is same group elements, are promising candidate for high-performance LIB electrodes because it has a higher theoretical specific capacity. (Si:4200 mAh/g, Ge:1600 mAh/g) However, it is well known that Si volume change by 400% upon full lithiation (lithium insertion into Si), which result in a mechanical pulverization and poor capacity retention during cycling. Therefore, variety of nanostructure group IV elements, including nanoparticles, nanowires, and hollow nanospheres, can be promising solution about the critical issues associated with the large volume change. However, the fundamental research about correlation between the composition and structure for LIB anode is not studied yet. Herein, we successfully synthesized various structure of nanowire such as Si-Ge, Ge-Carbon and Si-graphene core-shell types and analyzed the properties of LIB. Nanowires (NWs) were grown on stainless steel substrates using Au catalyst via VLS (Vapor Liquid Solid) mechanism. And, core-shell NWs were grown by VS (Vapor-Solid) process on the surface of NWs. In order to characterize it, we used FE-SEM, HR-TEM, and Raman spectroscopy. We measured battery property of various nanostructures for checking the capacity and cyclability by cell-tester.

• 전기전자학회논문지
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• 제13권2호
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• pp.126-131
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• 2009

Wrap-around 전계효과 트랜지스터는 채널과 전극간의 커플링을 매우 커서 채널길이가 짧아지면서 생기는 단채널효과(short channel effect)를 개선시킬 수 있는 이유로 많은 관심을 불러왔다. 본 논문에서는 실리콘 나노와이어를 이용하여 상향식의 wrap-around 전계효과 트랜지스터(FET)의 제작 공정을 소개한다. 소자의 제작 공정은 크게 전자빔 리소그래피, 유전영동(dielectrophoresis)을 이용한 나노와이어의 효과적 정렬 그리고 게이트 전극의 전기 화학적 도금(electrochemical deposition)을 이용한 생성 등의 방법들로 이루어진다. 전기 화학적 도금을 위한 용액은 독성을 띄지 않는 유기물 용액을 사용하였다. 액체 질소를 이용하여 polymethyl methacrylate(PMMA)가 전기화학적 도금시 형태를 잃지 않게 함으로써, 패터닝된 PMMA가 wrap-around 게이트 나노구조를 제작하기 위한 나노 템플릿으로 사용될 수 있도록 하였다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2014년도 추계학술대회
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• pp.773-776
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• 2014

본 연구에서는 채널 길이와 폭의 변화에 따른 실리콘 나노와이어 MOSFET 소자의 아날로그 특성을 비교 분석 하였다. 측정 온도는 $30^{\circ}C$, $50^{\circ}C$, $75^{\circ}C$, $100^{\circ}C$이다. 사용된 소자의 폭은 20nm, 30nm, 80nm, 130nm 와 길이는 250nm, 300nm, 250nm, 500nm을 사용하였다. 소자의 아날로그 특성은 이동도, 트랜스컨덕턴스, Early 전압, 전압이득, 드레인 전류 이다. 이동도는 폭이 증가함에 따라 증가하고 길이와 온도가 증가할수록 감소한다. 트랜스 컨덕턴스는 폭이 증가하면 증가한다. Early 전압은 길이와 온도가 증가함에 따라 증가하고 폭이 증가함에 따라 감소한다. 따라서 이득은 폭의 감소와 길이가 증가함에 따라 증가하고 온도가 증가함에 따라 감소하는 것을 알 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.143-143
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• 2008

Nanowires are promising options for building nanoscale electronic structures coming from high conductivity of nanowires. In particular, Deoxyribonucleic acid (DNA), which is structurally nanowire, can obtain highly ordered electronic components for nanocircuitry and/or nanodevices because of its very flexible length controllability, nanometer-size diameter, about 2 nm, and self-assembling properties. In this work, we used the method to form DNA-Nanowires (NWs) by using chemical treatment on Silicon (Si) surface, and Aminopropyl-triethoxysilane (APTES) was used as inducer of DNA sequence to modify the characteristics of Si surface. Moreover, we performed tilting technique to align DNA by the direction of flow of DNA solution. We investigated the assembly process between DNA molecules and APTES - coated Si surface according to the APTES concentration, from $1.2{\mu}\ell$ to $120{\mu}\ell$. Atomic Force Microscopy (AFM) images showed the combination rate of DNA molecules by the change of APTES concentration. As APTES concentration becomes thicker, aggregation of DNA molecules occurs, and this makes a kind of DNA networks. In this respect, we confirmed that there's a positive relationship between the concentration of APTES and the formation rate of DNA nanowires. Since there have been lots of research preceded to utilize DNA nanowires as template, so by using this positive relationship with proper alignment technique, realization of nano electronic devices with DNA nanowires might be feasible.