• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.261-264
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• 2005

The 90 nm gate pattern technology have been virtualized by employing the hard mask and the planarization of fate poly silicon. We fabricated 70nm poly-Si on $200 nm-SiO_2/p-Si(100)$ substrates using low pressure chemical vapor deposition (LPCVD) to investigate roughness evolution by varying rapid annealing temperatures. The samples were annealed at the temperatures of $700^{\circ}C\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The surface image and the surface roughness were measured by a field emission scanning electron microscopy (FESEM) and an atomic force microscopy (AFM), respectively. The poly silicon surface became more rough as temperature increased due to surface agglomeration. The optimum conditions of poly silicon planarization were achieved by annealed at $700^{\circ}C$ for 40 seconds.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.97-97
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• 2013

We present a comprehensive study on the integration of h-BN with silicon MOSFET. Temperature dependent mobility modeling is used to discern the effects of top-gate dielectric on carrier transport and identify limiting factors of the system. The result indicates that coulomb scattering and surface roughness scattering are the dominant scattering mechanisms for silicon MOSFETs at relatively low temperature. Interposing a layer of h-BN between $SiO_2$ and Si effectively weakens coulomb scattering by separating carriers in the silicon inversion layer from the charged centers as 2-dimensional h-BN is relatively inert and is expected to be free of dangling bonds or surface charge traps owing to the strong, in-plane, ionic bonding of the planar hexagonal lattice structure, thus leading to a significant improvement in mobility relative to undecorated system. Furthermore, the atomically planar surface of h-BN also suppresses surface roughness scattering in this Si MOSFET system, resulting in a monotonously increasing mobility curve along with gate voltage, which is different from the traditional one with a extremum in a certain voltage. Alternatively, high-k dielectrics can lead to enhanced transport properties through dielectric screening. Modeling indicates that we can achieve even higher mobility by using h-BN decorated $HfO_2$ as gate dielectric in silicon MOSFETs instead of h-BN decorated $SiO_2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.270-270
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• 2009

The surface texturing technology is one of the methods to improve the efficiency of crystalline silicon solar cell. This process reduced the reflectance at the surface by the so-called double bounce effect and increased the light trapping. Among these surface texturing technology, the laser texturing is effective for multi-crystalline silicon solar cells which have random crystallographic directions. We investigated the characteristics of laser processing on the surface of the multi-crystalline silicon solar cells using the fiber laser.

• Journal of the Korean Ceramic Society
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• v.21 no.4
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• pp.361-365
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• 1984

This study has been carried out to sinter silicon nitride with additives and to show the effect of surface finishments on its strength and Weibull modulus which are two most important factors for its applications into structural ceramics. Silicon nitride was sintered with the additions of $Al_2O_3$ and $Y_2O_3$ under pressureless cond-ition. The optimum properties were obtained by sintering at 1, 75$0^{\circ}C$ for 3hrs under $N_2$ atmosphere and the strength showed 6, 500kg/$cm^2$ at room temperature and 3, 300kg/$cm^2$ at 120$0^{\circ}C$. The effects of surface treatment on the strength of sintered $Si_3N_4$ were studied and the results showed that fine surface treatment increased the strength by up to 50% The Weibull analysis showed that its modulus was increased with increasing fineness of surface finishments. It was concluded that the mechanical properties of sintered silicon nitride could be improved by fine surface grinding which implied the brittle-fracture nature of sintered silicon nitride.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.5
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• pp.451-457
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• 2014

Surface roughness of mechanical components is an important factor which affects the tribological phenomena. Various surface patterns have been applied to surfaces to improve the tribological characteristics of mechanical components. In this work, the friction reduction effect of micropatterns on silicon was investigated. For this purpose, micro-dimple patterns were fabricated on silicon wafer by DRIE process. In the friction experiments silicone oil was used as lubricant. Also, the lubricant was cleaned to simulate a lubricant depleted condition. In depleted lubricated condition, friction coefficient of micro-pattern specimens was lower than specimens without micro-patterns. It was found that friction reduction effect of micro-pattern could be successfully maintained even after cleaning the lubricant on the surface.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.34-39
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• 2011

Screen printing method is a common way to fabricate the crystalline silicon solar cell with low-cost and high-efficiency. The screen printing metallization use silver paste and aluminum paste for front and rear contact, respectively. Especially the rear contact between aluminum and silicon is important to form the back surface filed (Al-BSF) after firing process. BSF plays an important role to reduces the surface recombination due to $p^+$ doping of back surface. However, Al electrode on back surface leads to bow occurring by differences in coefficient of thermal expansion of the aluminum and silicon. In this paper, we studied the properties of mono crystalline silicon solar cell for rear electrode with aluminum and aluminum-boron in order to characterize bow and BSF of each paste. The 156*156 $m^2$ p-type silicon wafers with $200{\mu}m$ thickness and 0.5-3 ${\Omega}\;cm$ resistivity were used after texturing, diffusion, and antireflection coating. The characteristics of solar cells was obtained by measuring vernier callipers, scanning electron microscope and light current-voltage. Solar cells with aluminum paste on the back surface were achieved with $V_{OC}$ = 0.618V, JSC = 35.49$mA/cm^2$, FF(Fill factor) = 78%, Efficiency = 17.13%.

• Journal of the Korean Society for Precision Engineering
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• v.26 no.9
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• pp.58-63
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• 2009

Silicon carbide (SiC) has been used for many engineering applications because of their high strength at high temperatures and high resistances to chemical degradation. SiC is very useful especially for a glass lens mold whose components demanded to the machining with good surface finish and low surface damage. The performance and reliability of optical components are strongly influenced by the surface damage of SiC during grinding process. Therefore, the severe process condition optimization shall be necessary for the highly qualified SiC glass lens mold. Usually the major form of damage in grinding of SiC is a crack occurs at surface and subsurface. The energy introduced in the layers close to the surface leads to the formation of these cracks. The experimental studies have been carried out to get optimum conditions for grinding of silicon carbide. To get the required qualified surface finish in grinding of SiC, the selection of type of the wheel is also important. Grinding processes of sintered SiC work-pieces is carried out with varying wheel type, depth of cut and feed using diamond wheel. The machining result of the surface roughness and the number of flaws, have been analyzed by use of surface profilers and SEM.

• Journal of the Korean institute of surface engineering
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• v.28 no.1
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• pp.55-63
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• 1995

Alkaline solutions such as $NH_4$OH, choline and TMAH (($CH_3$)$_4$NOH) have been introduced in semiconductor wet processing of silicon wafers to control ionic and particulate impurities following etching in acidic solutions. These chemicals usually mixed with hydrogen peroxide and/or surfactants to control the etch rate of silicon. The highest etch rate was observed in $NH_4$OH solutions at a pH in alkaline solutions. It indicates that the etch rate depends on the content of $OH^{-}$ as well as cations of alkaline solutions. STM/AFM techniques were used to characterize the effect of alkaline solutions on silicon surface roughness. In SC1 (mixture of $NH_4$OH : $H_2$$O_2$ : $H_2$O) solutions, the reduction of the ammonium hydroxide proportion from 1 to 0.1 decreased the surface roughness ($R_{rms}$) from 6.4 to $0.8\AA$. The addition of $H_2$$O_2$ and surfactants to choline and TMAH reduced the values of $R_{p-v}$ and $R_{rms}$ significantly. $H_2$$_O2$ and surfactants added in alkaline solutions passivate bare silicon surfaces by the oxidation and adsorption, respectively. The passivation of surfaces in alkaline solutions resulted in lower etch rate of silicon thereby provided smoother surfaces.s.ces.s.

• Korean Journal of Materials Research
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• v.22 no.1
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• pp.8-15
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• 2012

Silicon-based thin film was prepared at room temperature by an electrochemical deposition method and a feasibility study was conducted for its use as an anode material in a rechargeable lithium battery. The growth of the electrodeposits was mainly concentrated on the surface defects of the Cu substrate while that growth was trivial on the defect-free surface region. Intentional formation of random defects on the substrate by chemical etching led to uniform formation of deposits throughout the surface. The morphology of the electrodeposits reflected first the roughened surface of the substrate, but it became flattened as the deposition time increased, due primarily to the concentration of reduction current on the convex region of the deposits. The electrodeposits proved to be amorphous and to contain chlorine and carbon, together with silicon, indicating that the electrolyte is captured in the deposits during the fabrication process. The silicon in the deposits readily reacted with lithium, but thick deposits resulted in significant reaction overvoltage. The charge efficiency of oxidation (lithiation) to reduction (delithiation) was higher in the relatively thick deposit. This abnormal behavior needs to clarified in view of the thickness dependence of the internal residual stress and the relaxation tendency of the reaction-induced stress due to the porous structure of the deposits and the deposit components other than silicon.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3279-3281
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• 1999

This paper describes a method of direct wafer bonding using surfaces activated by a radio-frequency hydrogen plasma. The hydrogen plasma cleaning of silicon in the RIE mode was investigated as a pretreatment for silicon direct bonding. The cleaned silicon surface was successfully terminated by hydrogen, The hydrogen-terminated surfaces were rendered hydrophilic, which could be wetted by Dl water rinse. Two wafers of silicon and silicon dioxide were contacted to each other at room temperature and postannealed at $300{\sim}1100^{\circ}C$ in an $N_2$ atmosphere for 2 h. From the AFM results, it was revealed that the surface became rougher with the increased plasma exposure time and power. The effect of the plasma treatment on the surface chemistry was investigated by the AES analysis. It was shown that the carbon contamination at the surface could be reduced below 5 at %. The interfacial energy measured by the crack propagation method was 122 $mJ/m^2$ and 384 $mJ/m^2$ for RCA cleaning and hydrogen plasm, respectively.