• Title/Summary/Keyword: Silicon Oxide Bonding

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A Study on the Direct Bonding Method using the E-Beam Evaporated Silicon dioxide Film (전자선 증착된 실리콘 산화막층을 이용한 직접 접합에 관한 연구)

  • Park, Heung-Woo;Ju, Byeong-Kwon;Lee, Yun-Hi;Jeong, Seong-Jae;Lee, Nam-Yang;Koh, Ken-Ha;Haskard, M.R.;Park, Jung-Ho;Oh, Myung-Hwan
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1988-1990
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    • 1996
  • In this work, we have grown or evaporated thermal oxide and E-beam oxide on the (100) oriented n-type silicon wafers, respectively and they were directly bonded with another silicon wafer after hydrophilization using solutions of three types of $HNO_3$, $H_{2}SO_{4}$ and $NH_{4}OH$. Changes of average surface roughness after hydrophilizations of the single crystalline silicon wafer, thermal oxide and E-beam evaporated silicon oxide were studied using atomic force microscope. Bonding interfaces of the bonded pairs were inspected using scanning electron microscope. Void and non-contact area of the bonded pairs were also inspected using infrared transmission microscope.

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Study on the Direct Bonding of Silicon Wafers by Cleaning in $HNO_3:H_2_O2:HF$ (HNO$_3:H_2O_2$ : HF 세척법을 이용한 실리콘 직접 접합 기술에 관한 연구)

  • Joo, C.M.;Choi, W.B.;Kim, Y.S.;Kim, D.N.;Lee, J.S.;Sung, M.Y.
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3310-3312
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    • 1999
  • We have studied the method of silicon direct bonding using the mixture of $HNO_$, $H_2O_2$, and HF chemicals called the controlled slight etch (CSE) solution for the effective wafer cleaning. CSE, two combinations of oxidizing and etching agents, have been used to clean the silicon surfaces prior to wafer bonding. Two wafers of silicon and silicon dioxide were contacted each other at room temperature and postannealed at $300{\sim}1100^{\circ}C$ in $N_2$ ambient for 2.5 h. We have cleaned silicon wafers with the various HF concentrations and characterized the parameters with regard to surface roughness, chemical nature, chemical oxide thickness, and bonding energy. It was observed that the chemical oxide thickness on silicon wafer decreased with increasing HF concentrations. The initial interfacial energy and final energy postannealed at $1100^{\circ}C$ for 2.5h measured by the crack propagation method was 122 $mJ/m^2$ and 2.96 $mJ/m^2$, respectively.

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A Study on Characterization of P-N Junction Using Silicon Direct Bonding (실리콘 직접 본딩에 의한 P-N 접합의 특성에 관한 연구)

  • Jung, Won-Chae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.10
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    • pp.615-624
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    • 2017
  • This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.

A Study on the Characteristics of Silicon Direct Bonding by Hydrogen Plasma Treatment (수소 플라즈마 처리에 의한 실리콘 직접접합 특성에 관한 연구)

  • Choe, U-Beom;Ju, Cheol-Min;Kim, Dong-Nam;Seong, Man-Yeong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.7
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    • pp.424-432
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    • 2000
  • The plasma surface treatment, using hydrogen gas, of the silicon wafer was investigated as a pretreatment for the application to silicon-on-insulator (SOI) wafers using the silicon direct bonding technique. The chemical reactions of hydrogen plasma with surfaces were used for both the surface activation and the removal of surface contaminants. As a result of exposure of silicon wafer to the plasma, an active oxide layer was formed on the surface, which was rendered hydrophilic. The surface roughness and morphology were estimated as functions of plasma exposing time as well as of power. The surface became smoother with decreased incident hydrogen ion flux by reducing plasma exposing time and power. This process was very effective to reduce the carbon contaminants on the silicon surface, which was responsible for a high initial surface energy. The initial surface energy measured by the crack propagation method was 506 mJ/m2, which was up to about three times higher than that of a conventional RCA cleaning method.

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Fabrication of SiCOI Structures Using SDB and Etch-back Technology for MEMS Applications (SDB와 etch-back 기술에 의한 MEMS용 SiCOI 구조 제조)

  • Jung, Su-Yong;Woo, Hyung-Soon;Chung, Gwiy-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.830-833
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    • 2003
  • This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

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Synthesis and Properties of CuNx Thin Film for Cu/Ceramics Bonding

  • Chwa, Sang-Ok;Kim, Keun-Soo;Kim, Kwang-Ho
    • The Korean Journal of Ceramics
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    • v.4 no.3
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    • pp.222-226
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    • 1998
  • $Cu_3N$ film deposited on silicon oxide substrate by r.f. reactive sputtering technique. Synthesis and properties of copper nitride film were investigated for its possible application to Cu metallization as adhesive interlayer between copper and $SiO_2. Cu_3N$ film was synthesized at the substrate temperature ranging from $100^{\circ}C$ to $200^{\circ}C$ and at nitrogen gas ratio above $X_{N2}=0.4. Cu_3N, CuN_x$, and FGM-structured $Cu/CuN_x$ films prepared in this work passed Scotch-tape test and showed improved adhesion property to silicon oxide substrate compared with Cu film. Electrical resistivity of copper nitride film had a dependency on its lattice constant and was ranged from 10-7 to 10-1 $\Omega$cm. Copper nitride film was, however, unstable when it was annealed at the temperature above $400^{\circ}C$.

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The Effect of Hydrogen Plasma on Surface Roughness and Activation in SOI Wafer Fabrication

  • Park, Woo-Beom;Kang, Ho-Cheol;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.1
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    • pp.6-11
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    • 2000
  • The hydrogen plasma treatment of silicon wafers in the reactive ion-etching mode was studied for the application to silicon-on-insulator wafers which were prepared using the wafer bonding technique. The chemical reactions of hydrogen plasma with surface were used for both surface activation and removal of surface contaminants. As a result of exposure of silicon wafers to the plasma, an active oxide layer was found on the surface. This layer was rendered hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposing time and power. In addition, the surface became smoother with the shorter plasma exposing time and power. The value of initial surface energy estimated by the crack propagation method was 506 mJ/㎡, which was up to about three times higher as compared to the case of conventional direct using the wet RCA cleaning method.

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Lateral Structure Transistor by Silicon Direct Bonding Technology (실리콘 직접접합 기술을 이용한 횡방향 구조 트랜지스터)

  • 이정환;서희돈
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.759-762
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    • 2000
  • Present transistors which have vertical structure show increased parasitic capacitance characteristics in accordance with the increase of non-active base area and collector area, consequently have disadvantage for high speed switching performance. In this paper, a horizontal structure transistor which has minimized parasitic capacitance in virtue of SDB(Silicon Direct Bonding) wafer and oxide sidewall isolation utilizing silicon trench technology is presented. Its structural characteristics were designed by ATHENA(SUPREM4), the process simulator from SILVACO International, and its performance was proven by ATLAS, the device simulator from SILVACO International. The performance of the proposed horizontal structure transistor was certified through the VCE-lC characteristics curve, $h_{FE}$ -IC characteristics, and GP-plot.

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