• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.296-298
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• 1997

The performance of thin film pressure sensors with polyimide and silicon oxide as a insulating layer between the stainless steel diaphragm and the Cu-Ni strain gauges is presented. The polyimide was spun on the stainless steel diaphragm and cured in an oven. The silicon oxide was deposited by rf sputtering. The thin film pressure sensor with silicon oxide as a insulating layer showed a better nonlinearity and a lower hysteresis.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.257-260
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• 2010

Zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were prepared by the use of injector type atomic layer deposition. Two hybrid gate oxide systems of different polarity polymers with silicon oxide were examined with the aim of improving the properties of the transistors. The mobility and threshold voltage of a ZnO TFT with a poly(4-dimethylsilyl styrene) (Si-PS)/silicon oxide hybrid gate dielectric had values of 0.41 $cm^2/Vs$ and 24.4 V, and for polyimide/silicon oxide these values were 0.41 $cm^2/Vs$ and 24.4 V, respectively. The good hysteresis property was obtained with the dielectric of hydrophobicity. The solid output saturation behavior of ZnO TFTs was demonstrated with a $10^6$ on-off ratio.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.34 no.6
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• pp.244-252
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• 1985

A model is presented to explain charging phenomena into the oxide layer when a metal-oxide-silicon(MOS) capacitor is driven by a large amplitude and high frequency ac signal sufficient to produce avalanche injection in the silicon. During avalanche, minority carriers are injected. It is assumed that some of these minority carriers attain sufficient energy to surmount the potential barrier at the interface, and then inter the oxide. Measurements of C-V curves are made for the MOS capacitor with p-type silicon substrates before and after avalanche injection. This paper studies how charging in the oxide and the interface depends on oxide properties. It is concluded that this charging effect is related to the presence of water in the oxide.

• 한국전기화학회:학술대회논문집
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• 2001.04a
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• pp.47-47
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• 2001

• Korean Chemical Engineering Research
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• v.46 no.2
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• pp.408-413
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• 2008

In this work, the use of LPRTO (low pressure rapid thermal oxidation) and remote plasma oxidation was evaluated for the preparation of ultra thin silicon oxide layer with less than 5 nm. The silicon oxide thickness grown by LPRTO was rapidly increased and saturated. The maximum thickness could be controlled at about 5 nm. As RF power and oxygen flow rate at a remote plasma oxidation increased, the behavior of oxide growth was almost the same as that of LPRTO. The oxide thickness of 4 nm was the maximum obtained by a remote plasma oxidation in this work. The quality of silicon oxide grown by LPRTO was comparable to the thermally grown conventional oxide.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.239.2-239.2
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• 2016

Numerous studies and approaches have been performed for solar cells to improve their photoelectric conversion efficiencies. Among them, the study for electrode containing transparent conducting oxide (TCO) layers is one of issues as well as for the cell structure based on band theory. In this study, we focused on an interfacial layer between p-type silicon and indium tin oxide (ITO) well-known as TCO materials. According to current-voltage characteristics for the sample with the interfacial layers, the improvement of band alignment between p-type silicon and ITO was observed, and their ohmic properties were enhanced in the proper condition of deposition. To investigate cause of this improvement, spectroscopic ellipsometry and ultraviolet photoelectron spectroscopy were utilized. Using these techniques, band alignment and defect in the band gap were examined. The major materials of the interfacial layer are vanadium oxide and tungsten oxide, which are notable as a hole transfer layer in the organic solar cells. Finally, the interfacial layer was applied to silicon solar cells to see the actual behavior of carriers in the solar cells. In the case of vanadium oxide, we found 10% of improvement of photoelectric conversion efficiencies, compared to solar cells without interfacial layers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.83-83
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• 2008

Metal-oxide-silicon-on-insulator (MOSOI) structures were fabricated to study the effect caused by reactive ion etching (RIE) and sacrificial oxidation process on silicon-on-insulator (SOI) layer. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measured C-V curves were compared to the numerical results from 2-dimensional (2-D) simulations. The measurements revealed that the profile of C-V curves significantly changes depending on the SOI surface condition of the MOSOI capacitors. The shift in the measured C-V curves, due to the difference of the fixed oxide charge ($Q_f$), together with the numerical simulation analysis and atomic force microscopy (AFM) analysis, allowed extracting the fixed oxide charges ($Q_f$) in the structures as well as 2-D carrier distribution profiles.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.604-607
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• 2008

In this study, p-channel silicon-oxide-nitride-oxide-silicon (SONOS) transistors are fabricated and characterized as an unit cell for NAND flash memory. The SONOS transistors are fabricated by $0.13{\mu}m$ low power standard logic process technology. The thicknesses of gate insulators are $20{\AA}$ for the tunnel oxide, $14{\AA}$ for the nitride layer, and $49{\AA}$ for the blocking oxide. The fabricated SONGS transistors show low programming voltage, fast erase speed, and relatively good retention and endurance.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.4
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• pp.242-245
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• 2021

In this work, we fabricated oxide on an n-type silicon substrate through local anodic oxidation (LAO) using atomic force microscopy (AFM). The resulting oxide thickness was measured and its correlation with load force, scan speed and applied voltage was analyzed. The surface oxide layer was stripped using a buffered oxide etch. Ohmic contacts were created by applying silver paste on the silicon substrate back face. LAO was performed at approximately 70% humidity. The oxide thickness increased with increasing the load force, the voltage, and reducing the scan speed. We confirmed that LAO/AFM can be used to create both lateral and, to some extent, vertical shapes and patterns, as previously shown in the literature.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.894-897
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• 2006

Spatial distribution of injected electrons and holes is evaluated by using single-junction charge pumping technique in SONOS(Poly-silicon/Oxide/Nitride/Oxide/Silicon) memory cells. Injected electron are limited to length of ONO(Oxide/Nitride/oxide) region in locally ONO stacked cell, while are spread widely along with channel in fully ONO stacked cell. Hot-holes are trapped into the oxide as well as the ONO stack in locally ONO stacked cell.