• Proceedings of the Korean Society of Precision Engineering Conference
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• 1996.11a
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• pp.725-730
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• 1996

The key process in silicon surface micromachining is the selective etching of a sacrificial layer to release the silicon microstructure. The newly developed anhydrous HF/$CH_3$OH gas phase etching of TEOS (teraethylorthosilicate) sacrificial layers onto the polysilicon and the nitride substrates was employed to release the polysilicon microstructures. A residual product after TEOS etching onto the nitride substrate was observed on the surface, since a SiOxNy layer is formed on the TEOS/nitride interface. The polysilicon microstructures are stuck to the underlying substrate because SiOxNy layer does not vaporize. We found that the only sacrificial etching without any residual product and stiction is TEOS etching onto the polysilicon substrate.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.170-170
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• 2013

We present a novel etching technique for 2-dimentional (2-D) hexagonal boron nitride (h-BN) by using capacitively coupled plasma (CCP) of oxygen combined with a post-treatment by de-ionized (DI) water. Oxygen CCP etching process for h-BN has been systematically studied. It is found that a passivation layer was generated to obstruct further etching while it can be easily and radically removed by DI water. An essential cleaning effect also has been observed in the etching process, organic residues are successfully removed and the surface roughness has much decreased. Considering h-BN is the most important 2-D dielectric material and its potential application for graphene to silicon-based electronic devices, such an etching method can be widely used to control the 2-D h-BN thickness and improve the surface quality.

• Journal of Sensor Science and Technology
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• v.14 no.5
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• pp.357-361
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• 2005

Low-stress silicon nitride (LSN) thin films with embedded metal line have been developed as free standing structures to keep microspheres in proper locations and localized heat source for application to a chip-based sensor array for the simultaneous and near-real-time detection of multiple analytes in solution. The LSN film has been utilized as a structural material as well as a hard mask layer for wet anisotropic etching of silicon. The LSN was deposited by LPCVD (Low Pressure Chemical Vapor Deposition) process by varing the ratio of source gas flows. The residual stress of the LSN film was measured by laser curvature method. The residual stress of the LSN film is 6 times lower than that of the stoichiometric silicon nitride film. The test results showed that not only the LSN film but also the stack of LSN layers with embedded metal line could stand without notable deflection.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.318-321
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• 2005

FIB (Focused ion Beam) milling on a 500-nm-thick silicon nitride membrane was studied in order to fabricate a high-resolution shadow mask, or called a nanostencil. The silicon nitride membrane was fabricated by MEMS processes of LPCVD, photolithography, ICP etching and bulk silicon etching. The apertures made by FIB milling and normal photolithography were compared. The square metal pattern deposited through FIB milled shadow mask showed 6 times smaller comer radius than the case of photolithography. The results show high resolution patterning could be achieved by local deposition through FIB milled shadow-mask.

• Progress in Superconductivity and Cryogenics
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• v.20 no.4
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• pp.20-25
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• 2018

Niobium nitride (NbN) superconducting thin films with the thickness of 100 and 400 nm have been deposited on the surfaces of silicon oxide/silicon substrates using a sputtering method. Their superconducting properties have been evaluated in terms of the transition temperature, critical magnetic field, and critical current density. In addition, the NbN films were patterned in a line with a width of $10{\mu}m$ by a reactive ion etching (RIE) process for their characterization. This study proves the applicability of the standard complementary metal-oxide-semiconductor (CMOS) process in the fabrication of superconducting thin films without considerable degradation of superconducting properties.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.411-414
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PT layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PT layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PT layer of c-axial orientation rained thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PT layer were measured, too.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.677-680
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• 1999

Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.78-79
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• 2007

In this study, chemical dry characteristics of silicon nitride layers were investigated in the $F_2/N_2/Ar$ remote plasma. A toroidal-type remote plasma source was used for the generation of remote plasmas. The effects of additive $N_2$ gas on the etch rates of various silicon nitride layers deposited using different deposition techniques and precursors were investigated by varying the various process parameters, such as the $F_2$ flow rate, the addition $N_2$ flow rate and the substrate temperature. The etch rates of the various silicon nitride layers at the room temperature were initially increased and then decreased with the $N_2$ flow increased, which indicates an existence of the maximum etch rates. The etch rates of the silicon oxide layers were also significantly increased with the substrate temperature increased. In the present experiments the $F_2$ gas flow, addition $N_2$ flow rate and the substrate temperature were found to be the critical parameters in determining the etch rate of the silicon nitride layers

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2501-2503
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

• Journal of the Semiconductor & Display Technology
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• v.21 no.2
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• pp.45-50
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• 2022

The etching with high selectivity of silicon dioxide over silicon nitride is essential in semiconductor fabrication, and gas phase etch (GPE) can increase the competitiveness of the selective dielectric etch. In this work, GPE of plasma enhanced chemical vapor deposited SiO₂ was performed, and the effects of process parameters, such as temperature, partial pressure ratio, and gas supply cycle, are investigated in terms of etch rate and within wafer uniformity. Employing multiple regression analysis, the importance of each parameter elements is analyzed.