• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.874-877
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• 2001

SOI(Silicon-On-Insulator) technology is proposed as an alternative to bulk silicon for MEMS(Micro Electro Mechanical System) manufacturing. In this paper, we fabricated the SOI wafer with uniform active layer thickness by silicon direct bonding and mechanical polishing processes. Specially-designed electrostatic bonding system is introduced which is available for vacuum packaging and silicon-glass wafer bonding for SOG(Silicon On Glass) wafer. We demonstrated thermopile sensor and RF resonator using the SOI wafer, which has the merits of simple process and uniform membrane fabrication.

• ETRI Journal
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• v.27 no.4
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• pp.433-438
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• 2005

We present a new type of silicon micro-probe card using a three-dimensional probe beam of the cantilever type. It was fabricated using KOH and dry etching, a porous silicon micromachining technique, and an Au electroplating process. The cantilever-type probe beam had a thickness of $5 {\mu}m$, and a width of $50{\mu}$ and a length of $800 {\mu}m$. The probe beam for pad contact was formed by the thermal expansion coefficient difference between the films. The maximum height of the curled probe beam was $170 {\mu}m$, and an annealing process was performed for 20 min at $500^{\circ}C$. The contact resistance of the newly fabricated probe card was less than $2{\Omega}$, and its lifetime was more than 20,000 turns.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.199-202
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• 1999

In this paper, a possibility of building various types of RF passive components using the silicon micromachining technique has been examined with special emphasis on the wireless and mobile communication applications. Silicon micromachining technique is compatible with conventional silicon IC process and could provide a possibility of integrating base-band signal processing units and RF passive and active circuit components all in one silicon wafer rendering implementation of system-on-chip paradigm for future mobile and wireless communication systems.

• Transactions of the Society of Information Storage Systems
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• v.1 no.2
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• pp.175-181
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• 2005

SiOB is an essential part of slim optical pickup, where the silicon mirror, LD stand, silicon PD are integrated and LD is flip chip bonded. SiOB is fabricated with bulk micromachining. Especially the fabrication of silicon wafer with stepped concave areas has many extraordinary difficulties. As a matter of fact, experiences and knowledges are rare in the fabrication of the highly stepped silicon wafer. The difficulties occurring in the integration of PD and SiOB, and highly stepped patterning, and silicon mirror roughness and how-to-solve will be discussed.

• Laser Solutions
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• v.11 no.1
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• pp.12-18
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• 2008

Laser micromachining is a promising technique to fabricate the micro-scale devices. However, there remains important challenges to reducethe redeposition of ablated materials around the laser irradiated zone and to get a smooth surface, especially for metal and semiconductor materials. To achieve the high-quality micromachined devices, various methods have been developed. Liquid-assisted micromachining can be a good solution to overcome the previously mentioned problems. During the laser ablation process, the liquid around the solid sample dramatically changes the ablation characteristics, such as ablation rate, surface profile, formation of debris, and so on. In this investigation, we conducted the laser micromachining of Si in various liquid environmental conditions, such as liquid types, liquid thickness. In addition, using nanoscale time-resolved shadowgraphy technique, we observed the ablation process in liquid environments to understand the mechanism of liquid-assisted laser micromachining.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.1 s.178
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• pp.89-96
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• 2006

In this study, fabrication of the large area silicon mirror is accomplished by anisotropic wet etching using micromachining technology for implementation of integrated slim optical pickup and the process condition is also established for improving the mirror surface roughness. Until now, few results have been reported about the production of highly stepped $9.74^{\circ}$ off-axis-cut silicon wafers using wet etching. In addition rough surface of the mirror is achieved in case of tong etching time. Hence a novel method called magnetorheolocal finishing is applied to enhance the surface quality of the mirror plane. Finally, areal peak to valley surface roughness of mirror plane is reduced about 100nm in large area of $mm^2$ and it is applicable to optical pickup using infrared wavelength.

• Proceedings of the Optical Society of Korea Conference
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• 2003.02a
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• pp.322-323
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• 2003

Silicon substrate was fabricated by bulk silicon micromachining and it's structure is based on a proof mass suspended by two beam. To monitor the acceleration, dynamic excitation of accelerometer was performed using a shaker. The attached FFPI and suspension beam are bent because support beam move with variation of the proof mass. Thus phase difference detected by the acceleration change. So we can know that resonance frequency of fabricated accelerometer is about 557 Hz and dynamic range was measured from 0 g to 2 g.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.4
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• pp.149-154
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• 2004

This paper presents a silicon probe tip for vertical probe card application. The silicon probe tip was fabricated using MEMS technology such as porous silicon micromachining and deep- RIE (reactive ion etching). The thickness of the silicon epitaxial layers was 5 ${\mu}{\textrm}{m}$ and 7 ${\mu}{\textrm}{m}$, respectively. The width and length were 40 ${\mu}{\textrm}{m}$ and 600 ${\mu}{\textrm}{m}$, respectively. The probe structure was a multilayered structure and was composed of Au/Ni-Cr/Si$_3$N$_4$/n-epi layers. The height of the curled probe tip was measured as a function of the annealing temperature and time. Resistance characteristics of the probe tip were measured using a touchdown test.

• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.71-77
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• 1996

Considering that polycrystalline silicon, a structural material of the micromachining, is affected by a sacrificial oxide layer, the poly-oxide obtained by the thermal oxidation of polycrystalline silicon is newly proposed and estimated as the sacrificial oxide layer. The grain size of the polycrystalline silicon grown on the poly-oxide is larger than that of poly crystalline silicon grown on the conventional sacrificial oxide layer. As a result of XRD, increase of (111) textures and formation of additional (220) textures are observed on the polycrystaIline silicon deposited on the poly-oxide. Also, the polycrystalline silicon grown on the poly-oxide represents small and uniform stress.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.7
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• pp.52-58
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• 2000

최근 첨단 미세가공기술로 주목을 받고 있는 실리콘 마이크로머시닝 기술과 이를 기반으로 한 산업용 MEMS 개발현황을 소개한다. 전반부에서는 마이크로머시닝 기술의 종류를 소개하고 각각의 기술에 대해 기술근원, 미세가공원리와 기본 가공공정을 간략히 요약한 후 기전 집적형태의 마이크로머신과의 연계성을 고려한 시스템적인 측면에서의 기술특성을 상호 비교한다. 또한 가공의 양산성, 재현성, 조립성 측면에서 마이크로머시닝의 가공성을 조명함과 동시에 향후 발전방향을 전망한다.(중략)