• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.5
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• pp.258-261
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• 2002

Electrical forming dependent current-voltage (I-V) and numerically derived differential conductance(dI／dV) characteristics have been presented in the multi-layer nano-crystalline silicon／oxygen (no-Si／O) superlattice. Distinct staircase-like features, indicating the presence of resonant tunnel barriers, are clearly observed in the dc I-V characteristics. Also, all samples showed a continuous change in current and zero conductivity around OV corresponding to the Coulomb blockade in the calculated dI／dV-V curve. Also, Ra-man scattering measurement showed the presence of a nano-crystalline Si structure. This result becomes a step in the right direction for the fabrication of silicon-based optoelectronic and quantum devices as well as for the replacement of silicon-on-insulator (SOI) in high speed and low power silicon MOSFET devices of the future.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.346-346
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• 2010

A capacitorless one transistor dynamic random access memory (1T-DRAM) on silicon-germanium-on-insulator substrate was investigated. SGOI technology can make high effective mobility because of lattice mismatch between the Si channel and the SiGe buffer layer. To evaluate memory characteristics of 1T-DRAM, the floating body effect is generated by impact ionization (II) and gate induced drain leakage (GIDL) current. Compared with use of impact ionization current, the use of GIDL current leads to low power consumption and larger sense margin.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.100-105
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• 1994

Analytical expressions for the breakdown voltage and the optimum drift region length (L$_{dr}$) of SOI (Silicon-On-Insulator) pn diodes are derived in terms of the doping concentration and the thickness of the n- drift region and the buried oxide thickness. The optimum L$_{dr}$ is obtained from the condition that the breakdown voltage of the vertical electric field of n+n- junction equals to the of the lateral electric field of n+n-p+ junction. Analytical results agree reasonably with the numerical simulations using PISCESII.

• Journal of information and communication convergence engineering
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• v.3 no.4
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• pp.179-183
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• 2005

A photodiode capable of obtaining a sufficient photo/ dark current ratio at both forward bias state and reverse bias state is proposed. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as an insulator barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydro-generated amorphous silicon film. A good quality alumina $(Al_2O_3)$ film is formed by oxidation of aluminum film using electrolyte solution of succinic acid. Alumina is used as a potential barrier between amorphous silicon and aluminum. It controls dark-current restriction. In case of photodiodes made by changing the formation condition of alumina, we can obtain a stable dark current $(\~10^{-12}A)$ in alumina thickness below $1000{\AA}$. At the reverse bias state of the negative voltage in ITO (Indium Tin Oxide), the photo current has substantially constant value of $5{\times}10^{-9}$ A at light scan of 100 1x. On the other hand, the photo/dark current ratios become higher at smaller thicknesses of the alumina film. Therefore, the alumina film is used as a thin insulator barrier, which is distinct from the conventional concept of forming the insulator barrier layer near the transparent conduction film. Also, the structure with the insulator thin barrier layer formed near the lower electrode, opposed to the ITO film, solves the interface problem of the ITO film because it provides an improved photo current/dark current ratio.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.161-168
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• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.199-199
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• 2010

A back-gated MOSFET on silicon-on-insulator (SOI) substrate for pH sensor was investigated. We used concentrations of pH solution from 6 to 9. The fabricated back-gated MOSFET has current difference and threshold voltage shift by pH concentrations. Therefore, It can be used to simplification of conventional pH sensor.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.39-39
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• 2009

We fabricated p-channel TFTs based on poly Silicon. The 35nm thickness silicon dioxide layer structure got higher $I_{on}/I_{off}$ ratio, field-effect Mobility and output current than 10nm thickness. And 35nm layer showed low leakage current and threshold voltage. So, 35nm thickness silicon dioxide layer TFTs are faster reaction speed and lower power consumption than 10nm thickness.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1065-1068
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• 2003

For the first time, high quality ultra-thin strained Si/SiGe on Insulator (SGOI) substrate with total SGOI thickness( $T_{Si}$ + $T_{SiGe}$) of 13 nm is developed to combine the device benefits of strained silicon and SOI. In the case of 6- 10 nm-thick top silicon, 100-110 % $I_{d,sat}$ and electron mobility increase are shown in long channel nFET devices. However, 20-30% reduction of $I_{d,sat}$ and electron mobility are observed with 3 nm top silicon for the same long channel device. These results clearly show that the FETs operates with higher performance due to the strain enhancement from the insertion of SiGe layer between the top silicon layer and the buried oxide(BOX) layer. The performance degradation of the extremely thin( 3 nm ) top Si device can be attributed to the scattering of the majority carriers at the interfaces.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.83-88
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• 2003

The optoelectronic characteristics of semiconducto-atomic superlattice as a function of deposition temperature and annealing conditions have been studied. The nanocrystalline silicon/adsorbed oxygen superlattice formed by molecular beam epitaxy(MBE) system. As an experimental result, the superlattice with multilayer Si-O structure showed a stable photoluminescence(PL) and good insulating behavior with high breakdown voltage. This is very useful promise for Si-based optoelectronics and quantum devices as well as for the replacement of silicon-on-insulator (SOI) in ultra-high speed and lower power CMOS devices in the future, and it can be directly integrated with silicon ULSI processing.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1085-1088
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• 2003

In this work, we fabricated a gas-sensing device based on porous silicon(PS), and its I-V and C-V properties were investigated for sensing alcohol vapor. The structure of the sensor consists of thin Au/Oxidized porous silicon/porous silicon/Silicon/Al, where the silicon substrate is etched anisotropically to be prepared into a membrane shape. As the result, I-V curves showed typical tunneling property, and C-V curves were shaped like those of a MIS (metal-insulator- semiconductor) capacitor, where the capacitance in accumulation was increased with alcohol vapor concentration.