• 전기전자학회논문지
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• 제16권4호
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• pp.283-289
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• 2012

이 논문에서 Trench Power MOSFET의 스위칭 성능을 향상시키기 위한 Separate Gate Technique(SGT)을 제안하였다. Trench Power MOSFET의 스위칭 성능을 개선시키기 위해서는 낮은 gate-to-drain 전하 (Miller 전하)가 요구된다. 이를 위하여 제안된 separate gate technique은 얇은(~500A)의 poly-si을 deposition하여 sidewall을 형성함으로서, 기존의 Trench MOSFET에 비해 얇은 gate를 형성하였다. 이 효과로 gate와 drain에 overlap 되는 면적을 줄일 수 있어 gate bottom에 쌓이는 Qgd를 감소시키는 효과를 얻었고, 이에 따른 전기적인 특성을 Silvaco T-CAD silmulation tool을 이용하여 일반적인 Trench MOSFET과 성능을 비교하였다. 그 결과 Ciss(input capacitance : Cgs+Cgd), Coss(output capacitance : Cgd+Cds) 및 Crss(reverse recovery capacitance : Cgd) 모두 개선되었으며, 각각 14.3%, 23%, 30%의 capacitance 감소 효과를 확인하였다. 또한 inverter circuit을 구성하여, Qgd와 capacitance 감소로 인한 24%의 reverse recovery time의 성능향상을 확인하였다. 또한 제안된 소자는 기존 소자와 비교하여 어떠한 전기적 특성저하 없이 공정이 가능하다.

• 한국산학기술학회논문지
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• 제14권12호
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• pp.6047-6052
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• 2013

화장품제조업은 동일한 제품을 대량으로 생산하고 소비되는 구조로 금형을 통한 생산은 필연적이다. 화장품을 담는 용기는 소비자의 구매의사에도 영향을 주는 요소이며 완제품가격에서 차지하는 부분이 크기 때문에 경제성, 심미성과 기능성을 충족시키는 금형이 필요하다. 화장품 용기 중에 사각형태의 용기는 미성형 불량이 다른 형태의 제품보다 자주 발생하는 특징을 가진다. 기존에 사각형 형태의 화장품용기 제작공정은 2단 금형에 사이드게이트 구조로 금형을 제작하는데 이는 후가공과 게이트 흔적이 남는 단점이 있다. 본 연구에서 제안한 오버랩게이트는 후가공이 거의 없고 음각으로 게이트가 절단되는 특징이 있으며, 사이드게이트와 비교하여 Moldflow를 이용한 유동시스템을 시뮬레이션 하였다. 오버랩게이트가 유동성, 고화, 밀도, 에어트랩 등에서 유동성 향상과 불량률을 낮출 수 있는 결과를 확인하였으며, 해석결과를 기반으로 금형을 제작을 하고 사출성형 하였다. 본 연구를 통해 미성형 불량을 줄이고 심미성, 기능성 등의 특성을 가지는 화장품용기 제품의 대량생산 가능성을 검증하였다

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 전력전자학술대회 논문집
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• pp.36-37
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• 2013

This paper presents high voltage operation sensing boost converter with high side current. Proposed topology has three functions which are high voltage driving, high side current sensing and low voltage boost controller. High voltage gate driving block provides LED dimming function and switch function such as a load switch of LED driver. To protect abnormal fault and burn out of LED bar, it is applied high side current sensing method with high voltage driver. This proposed configuration of boost converter shows the effectiveness capability to LED driver through measurement results.

• 한국전기전자재료학회논문지
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• 제22권7호
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• pp.580-583
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• 2009

This paper introduces a gate drive IC for power modules with shoot-through immunity. A new approach uses a bootstrap diode as a high-side voltage bias and a level shift function at the same time. Therefore, the gate drive circuit becomes a simple and low-cost without conventional level shift functions such as HVIC(High-Voltage IC), optocoupler and transformer. The proposed gate drive IC is designed and fabricated using the Dongbu-Hitek's 0.35um BD350BA process. It has been tested and verified with IGBT modules.

• Journal of information and communication convergence engineering
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• 제8권1호
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• pp.107-111
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• 2010

This paper has presented the dependence of the threshold voltage on back gate bias and drain voltage for FinFET. The FinFET has three gates such as the front gate, side and back gate. Threshold voltage is defined as the front gate bias when drain current is 1 micro ampere as the onset of the turn-on condition. In this paper threshold voltage is investigated into the analytical potential model derived from three dimensional Poisson's equation with the variation of the back gate bias and drain voltage. The threshold voltage of a transistor is one of the key parameters in the design of CMOS circuits. The threshold voltage, which described the degree of short channel effects, has been extensively investigated. As known from the down scaling rules, the threshold voltage has been presented in the case that drain voltage is the 1.0V above, which is set as the maximum supply voltage, and the drain induced barrier lowing(DIBL), drain bias dependent threshold voltage, is obtained using this model.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.347-350
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• 2001

A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.81-82
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• 2009

This paper introduces a gate drive IC for power modules with shoot-through immunity. A new approach uses a bootstrap diode as a high-side voltage bias and a level shift function at the same time. Therefore, the gate drive circuit becomes a simple and low-cost without conventional level shift functions such as HVIC(High-Voltage IC), optocoupler and transformer. The proposed gate drive IC is designed and fabricated using the Dongbu-Hitek's 0.35um BD350BA process. It has been tested and verified with IGBT modules.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2011년도 추계학술대회 초록집
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• pp.165.2-165.2
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• 2011

Flow with suction to water turbine must be in stable state at small hydraulic power plant. But because of water level fluctuation and water gate effect according to irregular supply of cooling water, it would happen to produce bubble and vortex and finally lead to problems in power-plant system. With utilizing the concept design of double size gate, surface water overflowed the overhead of gate for stable flow at suction. We developed the overflow condition and analyzed the design factor with existed one such as water level(overflow amount) and overhead of water gate(overflow figure). Flow test and CFD simulation say that flow have stable state around suction and 20% of wave reduction effect at surface layer after surface water overflow.

• Journal of Information Display
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• 제5권2호
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• pp.1-5
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• 2004

We developed an a-Si TFT-LCD panel with integrated gate driver circuit using a standard 5-MASK process. To minimize the effect of the a-Si TFT current and LC's capacitance variation with temperature, we developed a new a-Si TFT circuit structure and minimized coupling capacitance by changing vertical architecture above gate driver circuit. Integration of gate driver circuit on glass substrate enables single chip and 3-side free panel structure in a-Si TFT-LCD of QVGA ($240{\times}320$) resolution. And using double ASG structure the dead space of TFT-LCD panel could be further decreased.

• 대한건축학회논문집:계획계
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• 제34권5호
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• pp.109-118
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• 2018

Noryang Temporary Palace was a place where king Jeongjo (1752-1800) would have lunch after crossing the Temporary Palace River on his way to Hwaseong Temporary Palace to worship at Hyeonryungwon, the tomb of his father, Sadoseja. The government offices in charge of ship bridge construction 'Jugyosa' and 'Byeoljangso' were located in the Temporary Palace. The central buildings of the Haenggung Palace, which ranged up to Yongyangbongjeojeong, were arranged to observe both 'Jugyosa' and 'Byeoljangso' from the Temporary Palace by lifting the ground from Sammun Gate to Yongyangbongjeojeong. Yongyangbongjeojeong, the center of Noryang Temporary Palace, features the style of royal palace architecture and functions of housing architecture. The 'Jugyosa' and 'Byeoljangso' buildings had eight quarters. According to the records, in addition, 15 wood sheds, 5 rice hubs, 3 barns, 1 side gate quarter, 1 front gate, 70 separate sheds, 2 suragan temporary buildings, oesammun gate and hongsalmun gate were found. Such architectural layout is matched with the Temporary Palace Jugyohwaneodo Painting.