• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.195-196
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• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.5
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• pp.282-285
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• 2014

We have investigated the structural and electrical properties of Si-Zn-Sn-O (SZTO) thin films deposited by RF magnetron sputtering at various deposition temperatures from RT to $350^{\circ}C$. All the SZTO thin fims are amorphous structure. The mobility of SZTO thin film has been changed depending on the deposition temperature. SZTO thin film transistor shows mobility of 8.715 $cm^2/Vs$ at room temperature. We performed the electrical stress test by applying gate and drain voltage. SZTO thin film transistor shows good stability deposited at room temperature while showing poor stability deposited at $350^{\circ}C$. As a result, the electrical performance and stability have been changed depending on deposition temperature mainly because high deposition temperature loosened the amorphous structure generating more oxygen vacancies.

• Electrical & Electronic Materials
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• v.9 no.3
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• pp.251-258
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• 1996

Sol-Gel derived ferroelectric Pb(Z $r_{0.52}$ $Ti_{0.48}$) $O_{3}$ thin films have been fabricated on Pt/Ti/ $SiO_{2}$/Si substrate. Two kinds of fast annealing methods, F-I (six times of intermediate and final annealing) and F-II(one final annealing after six times of intermediate annealing) were used for preparation of multi-coated PZT thin films. As the annealing temperature was increased, high capacitance could be obtained, for instance, 2700.angs.-thick PZT thin film annealed at 680.deg. C had a capacitance value of approximately 20nF at 1kHz. In addition, it is found that the dielectric constant is a function of the perovskite phase fraction. In case of F-I method, PZT thin film had a remanent polarization(Pr) of 8-15.mu.C/c $m^{2}$ and a coercive field( $E_{c}$) of 35-44kV/cm according to annealing temperature, whereas PZT film fabricated by F-II method had as high as 24-25.mu.C/c $m^{2}$ and 48-59kV/cm, respectively. As a result of measuring Curie temperature, PZT thin film had a range of 460-480.deg. C by F-I method and more or less higher range of 525-530.deg. C by F-II method, which implied that different microstructures could cause the different Curie temperature. Through I-V measurement, leakage current of PZT thin film fabricated by F-I and F-II methods was 64nA/c $m^{2}$ and 2.2.mu.A/c $m^{2}$ in the electric field of 100kV/cm, respectively.y.y.y.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.217-220
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• 2000

The SrBi$_2$Ta$_2$O$\_$9/(SBT) thin films are deposited on Pt-coated electrode(Pt/TiO$_2$/SiO$_2$/Si) using RF sputtering method. The SBT thin films deposited on substrate at 400-500[$^{\circ}C$]. SBT thin film deposited on Pt-coated electrodes have the cubic perovskite structure and polycrystalline state. With increasing annealing temperature from 600[$^{\circ}C$] to 850[$^{\circ}C$], flourite phase was crystallized to 650[。 and Bi-layered perovskite phase was crystallize ed above 700[$^{\circ}C$]. The maximum remnant polarization and the coercive electric field is 11.73[${\mu}$C/$\textrm{cm}^2$], 85[kV/cm] respectively at annealing temperature of 750[$^{\circ}C$]. The fatigue characteristics of SBT thin films deposited on Pt/TiO$_2$/SiO$_2$/Si substrate did not change up to 10$\^$10/ switching cycles.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.170-171
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• 2006

The chemical shift of SiOC film was observed according to the flow rate ratio. SiOC film has the broad main band of $880{\sim}1190cm^{-1}$ and the sharp Si-$CH_3$ bond at $1252cm^{-1}$, and the infrared spectra in the Si-O-C bond moved to low frequency according to the increasing of an oxygen flow rate. The chemical shift affected the carbon content in the SiOC film, and the decreasing of carbon atoms elongated the C-H bonding length, relatively. The main bond without the sharp Si-$CH_3$ bond at $1252cm^{-1}$ consisted of Si-C, C-O and Si-O bonds, and became the bonding structure of the Si-O-C bond.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.1057-1059
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• 2002

ZnO-Si-ZnO multi-layer thin films have been deposited by pulsed laser deposition (PLD). And then, the films have been annealed at $300^{\circ}C$ in oxygen ambient pressure. Electrical properties of the films were improved slightly than ZnO thin film without Si layer. Also, the optical and structural properties changed by Si layer in ZnO thin film. The optical and structural properties of Si-doped ZnO thin films were characterized by PL(Photoluminescence) and XRD(X-ray diffraction method) respectively. Electrical properties were measured by van der Pauw Hall measurements.

• Journal of the Korean Vacuum Society
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• v.12 no.2
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• pp.130-135
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• 2003

Polycrystalline silicon thin films have been used for low cost thin film device application. However, it was very difficult to fabricate high performance poly-Si at a temperature lower than $600^{\circ}C$ for glass substrate because the crystallization process technologies like conventional solid phase crystallization (SPC) require the number of high temperature (600-$1000^{\circ}C$) process. The objective of this paper is to grow poly-Si on flexible substrate using a rapid thermal crystallization (RTC) of amorphous silicon (a-Si) layer and make the high temperature process possible on molybdenum substrate. For the high temperature poly-Si growth, we deposited the a-Si film on the molybdenum sheet having a thickness of 150 $\mu\textrm{m}$ as flexible and low cost substrate. For crystallization, the heat treatment was performed in a RTA system. The experimental results show the grain size larger than 0.5 $\mu\textrm{m}$ and conductivity of $10^{-5}$ S/cm. The a-Si was crystallized at $1050^{\circ}C$ within 3min and improved crystal volume fraction of 92 % by RTA. We have successfully achieved a field effect mobility over 67 $\textrm{cm}^2$/Vs.

• Journal of the Semiconductor & Display Technology
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• v.18 no.2
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• pp.29-31
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• 2019

The ZTO/p-Si thin film was produced and investigated for tunneling phenomena caused by the interface characteristics of the depletion layer. ZTO thin film was deposited and heat treated to produce barrier potentials by the depletion layer. The negative resistance characteristics were shown in the thin film of ZTO heat treated at $100^{\circ}C$, and the insulation properties were the best. Current decreased in the negative voltage direction by nonlinear show key characteristics, and current decreased in tunneling phenomenon by negative resistance in the positive voltage direction. Heat treated at $100^{\circ}C$, the ZTO thin film has increased barrier potential in the areas of the depletion layer and therefore the current has increased rapidly. The current has decreased again as we go beyond the depletion layer. Therefore, tunneling can be seen to make insulation better. In the ZTO thin film heat treated at $70^{\circ}C$ without tunneling, leakage current occurred as current increased at positive voltage. Therefore, tunneling effects by negative resistance were found to enhance insulation properties electrically.

• Journal of Sensor Science and Technology
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• v.6 no.6
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• pp.483-490
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• 1997

Thin film Si has been used in sensors, radiation detectors, and solar cells. The carrier mobility of thin film Si influences the device behavior through its frequency response or time response. Since poly-Si shows the higher mobility value, a-Si:H films on Mo substrate were subjected to various crystallization treatments. Consequently, we need to find an appropriate method in mobility measurement before and after the anneal treatment. This paper investigates the carrier mobility improvement with anneal treatments and summarizes the mobility measurement methods of the a-Si:H and poly-Si film. Various techniques were investigated for the mobility determination such as Hall mobility, HS, TOF, SCLC, TFT, and TCO method. We learned that TFT and TCO method are suitable for the mobility determination of a-Si:H and poly-Si film. The measured mobility was improved by $2{\sim}3$ orders after high temperature anneal above $700^{\circ}C$ and grain boundary passivation using an RF plasma rehydrogenation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.18-19
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• 2008

Polycrystalline(poly) 3C-SiC film is a promising structural material for M/NEMS used in harsh environments, bio and fields. In order to realize poly 3C-SiC based M/NEMS devices, the electrical properties of poly 3C-SiC film have to be optimized. The n-type poly 3C-SiC thin film is deposited by APCVD using HMDS$(Si_2(CH_3)_6)$ as single precursor and are in-situ doped using N2. Resistivity values as low as 0.014 $\Omega$cm were achieved. The carrier concentration increased with doping from $3.0819\times10^{17}$ to $2.2994\times10^{19}cm^{-3}$ and electronicmobility increased from 2.433 to 29.299 $cm^2/V{\cdot}s$.