• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.183-184
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• 2013

Two main MBE growth techniques have been used: plasma-assisted MBE (PA-MBE), which utilizes a rf plasma to supply active nitrogen, and ammonia MBE, in which nitrogen is supplied by pyrolysis of NH3 on the sample surface during growth. PA-MBE is typically performed under metal-rich growth conditions, which results in the formation of gallium droplets on the sample surface and a narrow range of conditions for optimal growth. In contrast, high-quality GaN films can be grown by ammonia MBE under an excess nitrogen flux, which in principle should result in improved device uniformity due to the elimination of droplets and wider range of stable growth conditions. A drawback of ammonia MBE, on the other hand, is a serious memory effect of NH3 condensed on the cryo-panels and the vicinity of heaters, which ruins the control of critical growth stages, i.e. the native oxide desorption and the surface reconstruction, and the accurate control of V/III ratio, especially in the initial stage of seed layer growth. In this paper, we demonstrate that the reliable and reproducible growth of GaN on Si (110) substrates is successfully achieved by combining two MBE growth technologies using rf plasma and ammonia and setting a proper growth protocol. Samples were grown in a MBE system equipped with both a nitrogen rf plasma source (SVT) and an ammonia source. The ammonia gas purity was ＞99.9999% and further purified by using a getter filter. The custom-made injector designed to focus the ammonia flux onto the substrate was used for the gas delivery, while aluminum and gallium were provided via conventional effusion cells. The growth sequence to minimize the residual ammonia and subsequent memory effects is the following: (1) Native oxides are desorbed at $750^{\circ}C$ (Fig. (a) for [$1^-10$] and [001] azimuth) (2) 40 nm thick AlN is first grown using nitrogen rf plasma source at $900^{\circ}C$ nder the optimized condition to maintain the layer by layer growth of AlN buffer layer and slightly Al-rich condition. (Fig. (b)) (3) After switching to ammonia source, GaN growth is initiated with different V/III ratio and temperature conditions. A streaky RHEED pattern with an appearance of a weak ($2{\times}2$) reconstruction characteristic of Ga-polarity is observed all along the growth of subsequent GaN layer under optimized conditions. (Fig. (c)) The structural properties as well as dislocation densities as a function of growth conditions have been investigated using symmetrical and asymmetrical x-ray rocking curves. The electrical characteristics as a function of buffer and GaN layer growth conditions as well as the growth sequence will be also discussed. Figure: (a) RHEED pattern after oxide desorption (b) after 40 nm thick AlN growth using nitrogen rf plasma source and (c) after 600 nm thick GaN growth using ammonia source for (upper) [110] and (lower) [001] azimuth.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.45-49
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• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

• Korean Journal of Materials Research
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• v.10 no.3
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• pp.199-203
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• 2000

$Ta_2_O5$ and $Sr_0.8Bi_2.4Ta_2O_9$ films were deposited on p-type Si(100) substrates by a rf-magnetron sputtering and the metal organic decomposition (MOD), respectively.The electrical characteristics of the $Pt/SBT/Ta_2O_5/Si$ structure were obtained as the functions of $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering and $Ta_2_O5$ thickness. And to certify the role of $Ta_2_O5$ as a buffer layer, the electrical characteristics of $Pt/SBT/Ta_2O_5/Si$ were compared. $Pt/SBT/Ta_2O_5/Si$ capacitor with 20% $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering did now show typical C-V curve of metal/ferroelectric/insulator/semiconductor (MFIS) structure. The capacitor with 20% $O_2$ gas flow ratio during the $Ta_2_O5$ sputtering had the largest memory window. And the memory window was decreased as the $Ta_2_O5$ gas flow ratio during the $Ta_2_O5$ sputtering was increased to 40%, 60%. In the C-V characteristics of the $Pt/SBT/Ta_2O_5/Si$ capacitors with the different $Ta_2_O5$ thickness, the capacitor with 26nm thickness of $Ta_2_O5$ had the largest memory window. The C-V and leakage current characteristics of the Pt/SBT/Si structure were worse than those of $Pt/SBT/Ta_2O_5/Si$ structure. These results and Auger electron spectroscopy (AES) measurement showed that $Ta_2_O5$ films as a buffer layer tool a role to prevent from the formation of intermediate phase and interdiffusion between SBT and Si.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.221-224
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• 2000

We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

• Korean Journal of Crystallography
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• v.3 no.2
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• pp.98-110
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• 1992

B-SiC thin films were fabricated on Si(100) substrate under 1 atom by fVD. The effects of deposition conditions on the growth and the properties especially crystallinity and prefer ential alignment of these thin films were investigated. SiH4 and CH4 were used as source gases and H2 as Carrier gas. Th9 growth Of B-SiC thin films with changing parameters such as the growth temperature, the ratio of source gases (SiH4/CH4 ) and the total amount of source gases. The grown thin films were characterized by using SEM, a -step, XRD, Raman Spectro- scopy and TEM. Chemical conversion process improved the quality of thin films due to the formation of SiC buffer layer. The crystallinity of SiC thin films was improved when the growth temperature was higher than l150t and the amount of CH4 exceeded that of SiH4. The better crystallinity, the better alignment to the crystalline direction of substates. TEM analyses of the good quality thin films showed that the grain size was bigger at the surface than at the interface and the defect density is not depend on the ratio of the source gases.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.173-176
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• 1997

The III-V nitride semiconductor InN thin films which have the direct bandgap in visible light wavelength region have been deposited on Si(100) substrates and AIN/Si(100) substrates by rf reactive sputtering. InN thin films have been investigated on the structural, and electrical properties according to the sputtering parameters such as total pressure, rf power, and substrate temperature. It is found that optimal conditions required for fabricating InN thin films with high crystal Quality, low carrier concentration, high Hall mobility are total pressure 5mTorr, rf power 60W, substrate temperature 6$0^{\circ}C$ . InN thin films deposited on the AIN(60min.)/Si(100) substrates arid AIN(120min.)/Si(100) substrates showed remarkably high crystal quality and electrical properties. It is known that AIN buffer layer is to decrease free energy at interface between InN film and Si substrate, and then promoting lateral growth of InN films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.186-189
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• 2002

The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X-ray diffraction was used to determine the phase of the BLT thin films and the quality of the $CeO_2$ layer. The morphology of films and the interface structures of the BLT and the $CeO_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 4.78 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• Transactions of the Korean Society of Automotive Engineers
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• v.23 no.6
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• pp.656-662
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• 2015

In the present study, multi-layered Si DLC (Silicon Diamond-Like Carbon) coatings with HMDSO (Hexamethyldisiloxane) buffer layers are applied on SKD 11 substrates by PECVD (Plasma Enhanced Chemical Vapor Deposition) with different HMDSO gas flow rates, while the gas flow rate of $C_2H_2$ is fixed to enhance the electric resistivity of forming dies for electrically assisted forming. The HMDSO buffer layer is introduced to increase adhesion between the base metal and Si-DLC layers. The result of evaluation of electric resistivity and adhesion strength shows that the properties are affected by the flow rate of HMDSO, while the flow rate of 80 sccm results in the coating with the highest electric resistivity and adhesion strength among the selected flow rates.

• Proceedings of the Korean Vacuum Society Conference
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• 2004.08a
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• pp.116-116
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• 2004

• Journal of the Korean Ceramic Society
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• v.43 no.11 s.294
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• pp.715-723
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• 2006

Perovskite oxide materials are very important for the electronics industry, because they exhibit promising properties. With an interest in the obvious applications, significant effort has been invested in the growth of highly crystalline epitaxial perovskite oxide thin films in our laboratory. And the desired structure of films was formed to achieve excellent properties. $Y_1Ba_2Cu_3O_{7-x}$ (YBCO) superconducting thin films were simultaneously deposited on both sides of 3 inch wafer by inverted cylindrical sputtering. Values of microwave surface resistance R$_2$ (75 K, 145 GHz, 0 T) smaller than 100 m$\Omega$ were reached over the whole area of YBCO thin films by pre-seeded a self-template layer. For implementation of voltage tunable high-quality varactor, A tri-layer structured SrTiO$_3$ (STO) thin films with different tetragonal distortion degree was prepared in order to simultaneously achieve a large relative capacitance change and a small dielectric loss. Highly a-axis textured $Ba_{0.65}Sr_{0.35}TiO_3$ (BST65/35) thin films was grown on Pt/Ti/SiO$_2$/Si substrate for monolithic bolometers by introducing $Ba_{0.65}Sr_{0.35}RuO_3$ (BSR65/35) thin films as buffer layer. With the buffer layer, the leakage current density of BST65/35 thin films were greatly reduced, and the pyroelectric coefficient of $7.6\times10_{-7}$ C $cm^{-2}$ $K^{-1}$ was achieved at 6 V/$\mu$m bias and room temperature.