• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.3-6
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• 2004

Power semiconductor devices are being compact, high performance and intelligent thanks to recent remarkable developments of silicon design, process and related packaging technologies. Developments of MOS-gate transistors such as MOSFET and IGBT are dominant thanks to their advantages on high speed operation. In conjunction with package technology, silicon technologies such as trench, charge balance and NPT will support future power semiconductors. In addition, wide band gap material such as SiC and GaN are being studies for next generation power semiconductor devices.

• Journal of IKEEE
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• v.22 no.3
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• pp.706-711
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• 2018

In this work, we have investigated the characteristics of 4H-SiC metal-oxide-semiconductor (MOS) devices with silicon oxynitride (SiON) insulator using plasma enhanced chemical vapor deposition (PECVD). After post metallization annealing, the trap densities of the fabricated devices decreased significantly. In particular, the device annealed at $500^{\circ}C$ in forming gas ambient exhibited excellent MOS characteristics along with negligible hysteresis, which proved the potential of PECVD SiON as an alternative gate insulator for use in 4H-SiC MOS device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.217-221
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• 2004

[ $CO_2$ ]laser ablation rates for bulk 4H-SiC substrates and GaN/AIN/SiC templates in the range 229-870 ${\mu}m.min^{-1}$ were obtained for pulse energies of 7.5-30 mJ over diameters of 50·500 ${\mu}m$ with a Q-switched pulse width of ${\sim}30$ nsec and a pulse frequency of 8 Hz. The laser drilling produces much higher etch rates than conventional dry plasma etching (0.2 - 1.3 ${\mu}m/min$) making this an attractive maskless option for creating through-wafer via holes in SiC or GaN/AlN/SiC templates for power metal-semiconductor field effect transistor applications. The via entry can be tapered to facilitate subsequent metallization by control of the laser power and the total residual surface contamination can be minimized in a similar fashion and with a high gas throughput to avoid redeposition. The sidewall roughness is also comparable or better than conventional via holes created by plasma etching.

• Korean Journal of Materials Research
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• v.8 no.10
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• pp.956-960
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• 1998

The interfacial reaction between the CoINb bilayer and the $SiO_2$ substrate in the temperature range of $330^{\circ}C$-$800^{\circ}C$ in a vacuum has been investigated by X-ray photoelectron spectroscopy, glancing angle XRD, Auger Electron Spectroscopy and Atomic force microscopy. The Co and Nb were actively interdiffused at $600^{\circ}C$, and the layer inversion completed at $700^{\circ}C$. NbO was formed by interfacial reaction between the Nb interlayer and the $SiO_2$ substrate, while $Nb_20_5$ was formed on the surface by reaction of Nb with oxygen in the ambients. Free Si atoms obtained by the reaction between Nb and $SiO_2$ formed silicides like CoSi and $Nb_5Si_3$ by reacting with Co and Nb remnants. The sheet resistance of the Co/Nb bilayer increased substantially after annealing at $800^{\circ}C$. which is due to the agglomeration of the Co layer to reduce its surface energy.

• Proceedings of the Korean Ceranic Society Conference
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• 2000.10a
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• pp.158.1-158
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• 2000

• Proceedings of the Korean Ceranic Society Conference
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• 2002.10a
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• pp.34.1-34
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• 2002

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.24 no.3
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• pp.106-110
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• 2014

The passivation property of $Al_2O_3$ thin film formed using atomic layer deposition (ALD) for the application of crystalline Si solar cells was investigated using microwave photoconductance decay (${\mu}$-PCD). After post-annealing at $400^{\circ}C$ for 5 min, $Al_2O_3$ thin film exhibited the structural stability having amorphous nature without the interfacial reaction between $Al_2O_3$ and Si. The post-annealing at $400^{\circ}C$ for 5 min led to an increase in the relative effective lifetime of $Al_2O_3$ thin film. This could be associated with the field effective passivation combined with surface passivation of textured Si. The capacitance-voltage (C-V) characteristics of the metal-oxide-semiconductor (MOS) with $Al_2O_3$ thin film post-annealed at $400^{\circ}C$ for 5 min was carried out to evaluate the negative fixed charge of $Al_2O_3$ thin film. From the relationship between flatband voltage ($V_{FB}$) and equivalent oxide thickness (EOT), which were extracted from C-V characteristics, the negative fixed charge of $Al_2O_3$ thin film was calculated to be $2.5{\times}10^{12}cm^{-2}$, of which value was applicable to the passivation layer of n-type crystalline Si solar cells.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.48-51
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• 2004

In this paper the importance of re-nitridation on a plasma-enhanced chemical-vapor deposited(PECVD) $SiO_2$ stacked on a thermally grown thin-nitrided $SiO_2$ on n-type 4H SiC have been investigated. Without the final re-nitridation process, the leakage current of metaloxidesemiconductor(MOS) was extremely large. It is believed that water and carbon, contamination from the low-thermal budget PECVD process, are the main factors that destroyed the high quality thin-buffer nitrided oxide. After re-nitridation annealing, the quality of the stacked gate oxide was improved. The reasons of this improvement are presented.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.215-218
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• 2005

Co-interlayer와 $SiO_2$ 상부막이 nickel germanosilicide 박막의 열안정성에 미치는 영향을 연구하였다. Nickel germanosilicide는 SiGe 기판 위에 Ni(8nm)/TiN(25nm), Ni(6m)/Co(2nm)/TiN(25nm)을 증착하여 각각 one step RIP($500^{\circ}C$)와 two step RTP(500. $700^{\circ}C$)로 형성되었다. 50과 10nm 두께의 $SiO_2$ 박막을 실리사이드 위에 증착하고, 550, 600, $650^{\circ}C$에서 30분간 열처리한 후 면저항 값을 측정하여 열안정성을 평가하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2004.08a
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• pp.129-129
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• 2004