• Korean Journal of Materials Research
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• v.14 no.5
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• pp.343-347
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• 2004

We investigated the growth feasibility of polycrystalline Si film on mica substrate for the transfer of the layer to a plastic substrate. The annealing temperature was limited up to $600^{\circ}C$ because of crack development in the mica substrate. Amorphous Si film was deposited on mica substrate by PECVD and was crystallized by furnace annealing. During the annealing, bubbles were formed at the Si/mica interface. The bubble formation was avoided by the Ar-plasma treatment before amorphous Si deposition. A uniform and clean polycrystalline Si film was obtained by coating $NiCl_2$ on the amorphous Si film and annealing at $500^{\circ}C$ for 10 h. The conventional Si lithography was possible on the mica substrate and the devices fabricated on the substrate could be transferred to a plastic substrate.

• Journal of the Korean Ceramic Society
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• v.36 no.6
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• pp.604-610
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• 1999

Silicide layer structures and morphology degradation of the surface and interface of the silicide layers for he Co/refractory metal bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The CoSi-CoSi2 phase transition temperature is lower an morphology degradation of the silcide layer occurs more severely for the Co/refractorymetal bilayer on the P-doped polycrystalline Si substrate than on the single Si substrate. Also the final layer structure and the morphology of the films after silicidation annealing was found to depend strongly upon the interlayer metal. The layer structure after silicidation annealing of Co/Hf/doped-poly Si is Co-Hf alloy/polycrystalline CoSi2/poly Si substrate while that of Co/Nb is polycrystalline CoSi2/NbSi2/polycrystalline CoSi2/poly Si.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.12
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• pp.6106-6113
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• 2013

Automotive three-way catalyst substrate has a cordierite ceramic honeycomb structure. The substrate in the high engine speed range doesn't satisfy the design fatigue life due to the low mechanical properties of cordierite ceramic. SiC ceramic has higher mechanical properties than cordierite ceramic. If the automotive three-way catalyst substrate is made from the SiC ceramic honeycomb structure, the substrate can be prevented from premature failure. In this study, the mechanical properties of SiC ceramic honeycomb substrate were estimated by FEA. The FEA results indicated that the MOR and elastic modulus for the SiC ceramic honeycomb substrate was much higher than those for the cordierite ceramic honeycomb substrate.

• Korean Journal of Materials Research
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• v.8 no.7
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• pp.579-583
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• 1998

Silicide layer structures, agglomeration of silicide layers, and dopant redistributions for the Co/Ti bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The $CoSi_2$ phase transition temperature is higher and agglomeration of the silicide layer occurs more severely for the Co/Ti bilayer on the doped polycrystalline Si substrate than on the single Si substrate. Also, dopant loss by outdiffusion is much more significant on the doped polycrystalline Si substrate than on the single Si substrate. All of these differences are attributed to the grain boundary diffusion and heavier doping concentration in the polycrystalline Si. The layer structure after silicidation annealing of Co/ Tildoped - polycrystalline Si is polycrystalline CoSi,/polycrystalline Si, while that of Co/TiI( 100) Si is Co- Ti- Si/epi- CoSi,/(lOO) Si.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1672-1678
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• 1989

Major problems preventing the device-quality GaAs/Si heterostructure are the lattice mismatch of about 4% and difference in thermal expansion coefficient by a factor of 2.64 between Si and GaAs. Ge is a good candidate for the buffer layer because its lattice parameter and thermal expansion coefficient are almost the same as those of GaAs. As a first step toward developing heterostructure such as GaAs/Ge/Si entirely by a home-built PAE (plasma-assisted epitaxy), Ge films have been deposited on p-type Si (100)substrate by the plasma assisted evaporation of solid Ge source. The characteristics of these Ge/Si heterostructure were determined by X-ray diffraction, SEM and Auge electron spectroscope. PAE system has been successfully applied to quality-good Ge layer on Si substrate at relatively low temperature. Furthermore, this system can remove the native oxide(SiO2) on Si substrate with in-situ cleaning procedure. Ge layer grown on Si substrate by PAE at substrate temperature of 450\ulcorner in hydrogen partial pressure of 10mTorr was expected with a good buffer layer for GaAs/Ge/Si heterostructure.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.4
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• pp.267-273
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• 1998

The band structures of $Si_{1-x}Ge_x$ layers grown on $Si_{1-y}Ge_y$ substrate are calculated using k$\cdot$p and strain Hamiltonians. The hole drift mobilities in the plane direction are then calculated by taking into account the screening effect and the density-of-states of the impurity band. When $Si_{1-x}Ge_x$ is grown on Si substrate, the mobilities of (110) and (111) $Si_{1-x}Ge_x$ layers are larger than that of (001) $Si_{1-x}Ge_x$. However, due to the large defect and surface scattering, (110) and (111) $Si_{1-x}Ge_x$ layers may not be useful for the development of the fast device. Meanwhile, when Si is grown on $Si_{1-y}Ge_y$ substrate, the mobilities of (001) and (110) Si layers are greatly enhanced. Based on the amount of defect and the surface scattering, it is expected that Si grown on (001) $Si_{1-y}Ge_y$ substrate, where the Ge contents is larger than 10%(y>0.1), has the highest mobility.

• Korean Journal of Crystallography
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• v.12 no.3
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• pp.166-170
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• 2001

Dopants implanted in silicon substrate affect the reaction between cobalt and silicon substrate. Phosphorous, unlike boron and arsenic, suppressing the reaction between cobalt and silicon induces CoSi formation during a low temperature thermal treatment instead of CoSi₂formation. The CoSi layer should move to the silicon substrate to fill the vacant volume that is generated in the silicon substrate due to the silicon out-diffusion into the cobalt/CoSi interface. The movement of CoSi at gate sidewall spacer region is suppressed by a cohesion between gate oxide and CoSi layers, resulting in a void formation at the gate sidewall spacer edge.

• ETRI Journal
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• v.26 no.3
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• pp.281-284
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• 2004

We demonstrate a new fabrication method for adjusting the temperature dependence of a polymeric arrayed-waveguide grating (AWG) on a Si substrate. A temperature-dependent wavelength shift of-0.1nm/$^{\circ}C$ in a polymeric AWG on a Si substrate is reduced of+0.1nm/$^{\circ}C$ by detaching part of the polymer film, including the grating channel region of the AWG, from the Si substrate while the other parts remain fixed on the substrate.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.115-120
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• 2007

Polycrystalline silicon (poly-Si) thin film transistors (TFTs) might be fabricated on the mica substrate and transferred to a flexible plastic substrate because mica can be easily cleaved into a thin layer. To overcome the adhesion and stress problem between poly-Si film and mica substrate, a buffer layer consisting of $SiO_x/Ta/Ti$ three layers has been developed. The $SiO_x$ layer is for electrical isolation, the Ti layer is for adhesion of $SiO_{x}$ and mica. and Ta is for stress relief between $SiO_x$ and Ti. A TFT was fabricated on the mica substrate by a conventional Si process and was successfully transferred to a plastic substrate.