• Title/Summary/Keyword: Si through-via

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Improving Flow Property of AlSi10Mg Powder for Additive Manufacturing via Surface Treatment using Methyltrichlorosilane (Methyltrichlorosilane 표면 처리를 통한 적층 제조용 AlSi10Mg 분말의 유동 특성 향상 공정 연구)

  • Park, Sang Cheol;Kim, In Yeong;Kim, Young Il;Kim, Dae-Kyeom;Lee, Kee-Ahn;Oh, Soong Ju;Lee, Bin
    • Journal of Powder Materials
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    • v.29 no.5
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    • pp.363-369
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    • 2022
  • AlSi10Mg alloys are being actively studied through additive manufacturing for application in the automobile and aerospace industries because of their excellent mechanical properties. To obtain a consistently high quality product through additive manufacturing, studying the flowability and spreadability of the metal powder is necessary. AlSi10Mg powder easily forms an oxide film on the powder surface and has hydrophilic properties, making it vulnerable to moisture. Therefore, in this study, AlSi10Mg powder was hydrophobically modified through silane surface treatment to improve the flowability and spreadability by reducing the effects of moisture. The improved flowability according to the number of silane surface treatments was confirmed using a Carney flowmeter. In addition, to confirm the effects of improved spreadability, the powder prior to surface treatment and that subjected to surface treatment four times were measured and compared using s self-designed recoating tester. The results of this study confirmed the improved flowability and spreadability based on the modified metal powder from hydrophilic to hydrophobic for obtaining a high-quality additive manufacturing product.

Dry etching of polysiliconin high density plasmas of $CI_2$ (고밀도 플라즈마를 사용한 $CI_2$/ Poly-Si 건식 식각)

    • Journal of the Korean Vacuum Society
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    • v.8 no.1
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    • pp.63-69
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    • 1999
  • The characteristic parameters of high density plasma source (Helical Resonator) have been measured with Langmuir probe to get the plasma density electron temperature, ion current density, etc. Optical emission spectra of Si and SiCl have been analyzed in $Cl_2$$/poly-Si system to elucidate etching mechanism. In this system, the main reaction to remove silicon atoms on the surface is proceeding mostly through chemical reaction, not pure physical reaction. The emission intensity of SiCl (chemical etching product) increases much faster than Si (pure physical etching product) with increasing the concentration of impurities (P). This is due to the electron transfer from substrate to the surface via Si-Cl bond. As a result, Si-Cl bond becomes more ionic and mobile, therefore the Cl-containing etchant forms $SiCl_x$ with surface more easily. Consequently, for the removal of Si atom from poly silicon surface, the chemical etching is more favorable than physical etching with increasing P concentrations.

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Dry Synthesis of Nearly Monodisperse Spherical Silica (단분산에 가까운 구형 실리카의 건식 제조)

  • Park, Hoey Kyung;Park, Kyun Young
    • Korean Chemical Engineering Research
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    • v.45 no.6
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    • pp.677-679
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    • 2007
  • Nearly monodisperse spherical silica particles, 200~300 nm in diameter, were produced via a dry route for the first time through a two-stage hydrolysis of $SiCl_4$ vapor. In the first stage, the $SiCl_4$ was partially hydrolyzed in a batch reactor at $150^{\circ}C$ to form nearly monodisperse silicon oxychloride particles. In the second stage, the oxychlorides were hydrolyzed further in a tubular reactor to have produced silica with the morphology and size nearly conserved.

Wafer-Level Three-Dimensional Monolithic Integration for Intelligent Wireless Terminals

  • Gutmann, R.J.;Zeng, A.Y.;Devarajan, S.;Lu, J.Q.;Rose, K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.3
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    • pp.196-203
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    • 2004
  • A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.

Effect of Coolants and Metal Bumps on the heat Removal of Liquid Cooled Microchannel System (액랭식 마이크로채널 시스템 내 냉매와 범프의 열 제거 효과에 대한 연구)

  • Won, Yonghyun;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.2
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    • pp.61-67
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    • 2017
  • As transistor density increases rapidly, a heat flux from IC device rises at fast rate. Thermal issues raised by high heat flux cause IC's performance and reliability problems. To solve these thermal management problems, the conventional cooling methods of IC devices were reached their thermal limit. As a result, alternative cooling methods such as liquid heat pipe, thermoelectric cooler, thermal Si via and etc. are currently emerging. In this paper microchannel liquid cooling system with TSV was investigated. The effects of 2 coolants (DI water and ethylene glycol 70 wt%) and 3 metal bumps (Ag, Cu, Cr/Au/Cu) on cooling performance were studied, and the total heat flux of various coolant and bump cases were compared. Surface temperature of liquid cooling system was measured by infrared microscopy, and liquid flowing through microchannel was observed by fluorescence microscope. In the case of ethylene glycol 70 wt% at $200^{\circ}C$ heating temperature, the total heat flux was $2.42W/cm^2$ and most of total heat flux was from liquid cooling effect.

Effective Cu Filling Method to TSV for 3-dimensional Si Chip Stacking (3차원 Si칩 실장을 위한 효과적인 Cu 충전 방법)

  • Hong, Sung Chul;Jung, Do Hyun;Jung, Jae Pil;Kim, Wonjoong
    • Korean Journal of Metals and Materials
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    • v.50 no.2
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    • pp.152-158
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    • 2012
  • The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and $60{\mu}m$, respectively. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of $-5.85mA/cm^2$, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

Removal of Aspect-Ratio-Dependent Etching by Low-Angle Forward Reflected Neutral-Beam Etching (Low-Angle Forward Reflected Neutral Beam Etching을 이용한 Aspect-Ratio-Dependent Etching 현상의 제거)

  • Min Kyung-Seok;Park Byoung-Jae;Yeom Geun-Young;Kim Sung-Jin;Lee Jae-Koo
    • Journal of the Korean Vacuum Society
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    • v.15 no.4
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    • pp.387-394
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    • 2006
  • In this study, the effect of using a neutral beam formed by low-angle forward reflection of a reactive ion beam on aspect-ratio-dependent etching (ARDE) has been investigated. When a SF6 Inductively Coupled Plasma and $SF_6$ ion beam etching are used to etch poly-Si, ARDE is observed and the etching of poly-Si on $SiO_2$ shows a higher ARDE effect than the etching of poly-Si on Si. However, by using neutral beam etching with neutral beam directionality higher than 70 %, ARDE during poly-Si etching by $SF_6$ can be effectively removed, regardless of the sample conditions. The mechanism for the removal of ARDE via a directional neutral beam has been demonstrated through a computer simulation of different nanoscale features by using the two-dimensional XOOPIC code and the TRIM code.

Densification of Cf/SiC Composite Using PIP with Adding of Cyclohexene (Cyclohexene을 첨가한 PIP 공정 사용 Cf/SiC 복합재의 고밀도화)

  • Bae, Jin-Cheol;Cho, Kwang-Youn;Kim, Jun-Il;Im, Dong-Won;Park, Jong-Kyu;Lee, Man-Young;Lee, Jae-Yeol
    • Composites Research
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    • v.26 no.5
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    • pp.322-327
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    • 2013
  • Carbon fiber-reinforced SiC matrix composites have good oxidation resistance and thermal shock resistance. These properties have allowed the composites to be applied to high-temperature structures. In this study, $C_f/SiC$ composites were fabricated via precursor infiltration and pyrolysis (PIP) process, including liquid phase infiltration and chemical vapor curing using cyclohexene. The final $C_f/SiC$ composites, which have gone through the PIP process five times, showed a density of $1.79g/cm^3$, as compared to a density of $0.43g/cm^3$ for pre-densified bare carbon fiber preform. As for the oxidation resistance characteristics, the weight of $C_f/SiC$ composite was maintained at 81% at $1400^{\circ}C$ in air for 6 hours. Chemical vapor curing (CVC) using cyclohexene has shown to be an effective method to achieve high densification, leading to increased oxidation resistance.

Properties of Dinickel-Silicides Counter Electrodes with Rapid Thermal Annealing

  • Kim, Kwangbae;Noh, Yunyoung;Song, Ohsung
    • Korean Journal of Materials Research
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    • v.27 no.2
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    • pp.94-99
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    • 2017
  • Dinickel-silicide $(Ni_2Si)/glass$ was employed as a counter electrode for a dye-sensitized solar cell (DSSC) device. $Ni_2Si$ was formed by rapid thermal annealing (RTA) at $700^{\circ}C$ for 15 seconds of a 50 nm-Ni/50 nm-Si/glass structure. For comparison, $Ni_2Si$ on quartz was also prepared through conventional electric furnace annealing (CEA) at $800^{\circ}C$ for 30 minutes. XRD, XPS, and EDS line scanning of TEM were used to confirm the formation of $Ni_2Si$. TEM and CV were employed to confirm the microstructure and catalytic activity. Photovoltaic properties were examined using a solar simulator and potentiostat. XRD, XPS, and EDS line scanning results showed that both CEA and RTA successfully led to tne formation of nano $thick-Ni_2Si$ phase. The catalytic activity of $CEA-Ni_2Si$ and $RTA-Ni_2Si$ with respect to Pt were 68 % and 56 %. Energy conversion efficiencies (ECEs) of DSSCs with $CEA-Ni_2Si$ and $RTA-Ni_2Si$catalysts were 3.66 % and 3.16 %, respectively. Our results imply that nano-thick $Ni_2Si$ may be used to replace Pt as a reduction catalytic layer for a DSSCs. Moreover, we show that nano-thick $Ni_2Si$ can be made available on a low-cost glass substrate via the RTA process.

Through-Si-Via(TSV) Filling of Cu with Single Additive (단일 첨가제를 이용한 관통 실리콘 비아의 구리 충진 공정 연구)

  • Jin, Sang-Hyeon;Seo, Seong-Ho;Park, Sang-U;Yu, Bong-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2015.11a
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    • pp.191-191
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    • 2015
  • 반도체 소자 성능 향상을 위한 3차원 TSV배선 공정이 연구되었다. 전기도금을 이용한 TSV 공정 시 기존에는 황산 구리 수용액내에 억제제, 가속제, 평탄제등을 첨가한 복잡한 전해질이 사용되었지만 본 연구에서는 억제제만을 이용하여 Cu bottom-up filling에 성공하여 전해질의 조성을 단순화 시켰다.

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