• Transactions of the Korean Society of Mechanical Engineers A
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• v.26 no.3
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• pp.428-435
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• 2002

Pyroelectric $Pb(Zr_{0.3}Ti_{0.7})O_3$ (PZT30/70) thin film IR detectors has been fabricated and characterised. The PZT30/70 thin film was deposited onto $Pt/Ti/Si_3N_4/SiO_2/Si$ substrate by the sol-gel process. Four different substrate conditions were studied for their effects on the pyroelectric responses of the IR detectors. The substrate conditions were the combinations of the Si etching and the Pt/Ti patterning. In the Si etched substrate, the $Si_3N_4/SiO_2$ composite layer was used as silicon etch-stop, and was used as the membrane to support the PZT pyroelectric film element as well. The measured pyroelectric current and voltage responses of detectors fabricated on the micro-machined thin $Si_3N_4/SiO_2$ membrane were two orders higher than those of the detectors on the bulk-silicon. For detectors on the membrane substrate, the Pt/Ti patterned detectors showed a 2-times higher pyroelectric response than that of not-patterned detectors. On the other hand, the pyroelectric response of the detectors on the not-etched Si substrate was almost the same, regardless of the Pt/Ti patterning. It was also found that the rise time strongly depended on the substrate thickness: the thicker the substrate was, the longer the rise-time.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.36-39
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• 2002

Polycrystalline silicon (poly-Si) thin film transistor (TFT) technology is emerging as a key technology for active matrix liquid crystal displays (AMLCD), allowing the integration of both active matrix and driving circuit on the same substrate (normally glass). As high temperature process is not used for glass substrate because of the low softening points below 450$^{\circ}C$. However, high temperature process is required for getting high crystallization volume fraction (i.e. crystallinity). A poly-Si thin film transistor has been fabricated to investigate the effect of high temperature process on the molybdenum (Mo) substrate. Improve of the crystallinity over 75% has been noticed. The properties of structural and electrical at high temperature poly-Si thin film transistor on Mo substrate have been also analyzed using a sputtering method

• ETRI Journal
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• v.19 no.1
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• pp.26-35
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• 1997

The substrate effects on solid-phase crystallization of amorphous silicon (a-Si) films deposited by low-pressure chemical vapor deposition (LPCVD) using $Si_2H_6$ gas have been extensively investigated. The a-Si films were prepared on various substrates, such as thermally oxidized Si wafer ($SiO_2$/Si), quartz and LPCVD-oxide, and annealed at 600$^{\circ}C$ in an $N_2$ ambient for crystallization. The crystallization behavior was found to be strongly dependent on the substrate even though all the silicon films were deposited in amorphous phase. It was first observed that crystallization in a-Si films deposited on the $SiO_2$/Si starts from the interface between the a-Si and the substrate, so called interface-interface-induced crystallization, while random nucleation process dominates on the other substrates. The different kinetics and mechanism of solid-phase crystallization is attributed to the structural disorderness of a-Si films, which is strongly affected by the surface roughness of the substrates.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.22-25
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• 2002

In this paper, we deposited MgO buffer layer on p-type (100)Si substrate in the condition of substrate temperature 400$^{\circ}C$, working gas ratio Ar:O$_2$=80:20, RF Power 50W, working pressure 10mtorr, and the thickness of the film was about 300${\AA}$. Then we deposited Ba$\sub$0.5/Sr$\sub$0.5/TiO$_3$ thin film using RF Magnetron sputtering method on the MgO/Si substrate in various RF power of 25W, 50W, 75W. The film deposited in 50W showed the best crystalline from the XRD measurement. To know the electrical properties of the film, we manufactured Al/BSTMgO(300${\AA}$)/Si/Al structure capacitor. In the result of I-V measurement, The leakage current density of the capacitor was lower than 10$\^$-7/A/$\textrm{cm}^2$ at the range of ${\pm}$150kV/cm. From C-V characteristics of the capacitor, can calculate the dielectric constant and it was 305. Finally we deposited BST thin film on bare Si substrate and (100)MgO substrate in the same deposition condition. From the comparate of the properties of these samples, we found the properties of BST thin film which deposited on MgO/Si substrate were better than on bare Si substrate and similar to on MgO substrate.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.96.2-96.2
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• 2010

The surface morphology and structural properties of polycrystalline silicon (poly-Si) films made in-situ aluminum induced crystallization at various substrate temperature (300~600) was investigated. Silicon films were deposited by hot-wire chemical vapor deposition (HWCVD), as the catalytic or pyrolytic decomposition of precursor gases SiH4 occurs only on the surface of the heated wire. Aluminum films were deposited by DC magnetron sputtering at room temperature. continuous poly-Si films were achieved at low temperature. from cross-section TEM analyses, It was confirmed that poly-Si above $450^{\circ}C$ was successfully grown on and poly-Si films had (111) preferred orientation. As substrate temperature increases, Si(111)/Si(220) ratio was decreased. The electrical properties of poly-Si film were investigated by Hall effect measurement. Poly-Si film was p-type by Al and resistivity and hall effect mobility was affected by substrate temperature.

• Journal of the Korean Ceramic Society
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• v.50 no.2
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• pp.122-126
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• 2013

The surface roughness of the inner and outer surfaces of a tube is an important requirement for nuclear fuel cladding. When an inner SiC clad tube, which is considered as an advanced Pressurized Water Cooled Reactor (PWR) clad with a three-layered structure, is fabricated by Chemical Vapor Deposition (CVD), the surface roughness of the substrate, graphite, is an important process parameter. The surface character of the graphite substrate could directly affect the roughness of the inner surface of SiC deposits, which is in contact with a substrate. To evaluate the effects of the surface roughness changes of a substrate, SiC deposits were fabricated using different types of graphite substrates prepared by the following four polishing paths and heat-treatment for purification: (1) polishing with #220 abrasive paper (PP) without heat treatment (HT), (2) polishing with #220 PP with HT, (3) #2400 PP without HT, (4) polishing with #2400 PP with HT. The average surface roughnesses (Ra) of each deposited SiC layer are 4.273, 6.599, 3.069, and $6.401{\mu}m$, respectively. In the low pressure SiC CVD process with a graphite substrate, the removal of graphite particles on the graphite surface during the purification and the temperature increasing process for CVD seemed to affect the surface roughness of SiC deposits. For the lower surface roughness of the as-deposited interlayer of SiC on the graphite substrate, the fine controlled processing with the completed removal of rough scratches and cleaning at each polishing and heat treating step was important.

• Korean Journal of Materials Research
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• v.19 no.1
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• pp.50-53
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• 2009

Multi-walled carbon nanotubes (MWNTs) were synthesized on different substrates (bare Si and $SiO_2$/Si substrate) to investigate dye-sensitized solar cell (DSSC) applications as counter electrode materials. The synthesis of MWNTs samples used identical conditions of a Fe catalyst created by thermal chemical vapor deposition at $900^{\circ}C$. It was found that the diameter of the MWNTs on the Si substrate sample is approximately $5{\sim}10nm$ larger than that of a $SiO_2$/Si substrate sample. Moreover, MWNTs on a Si substrate sample were well-crystallized in terms of their Raman spectrum. In addition, the MWNTs on Si substrate sample show an enhanced redox reaction, as observed through a smaller interface resistance and faster reaction rates in the EIS spectrum. The results show that DSSCs with a MWNT counter electrode on a bare Si substrate sample demonstrate energy conversion efficiency in excess of 1.4 %.

• Journal of the Korean Ceramic Society
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• v.34 no.12
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• pp.1199-1204
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• 1997

SiC conversion layer was fabricated by the chemical vapor reaction between graphite substrate and silica powder. The CVR process was carried out in nitrogen atmosphere at 175$0^{\circ}C$ and 185$0^{\circ}C$. From the reduction of silica powder with graphite substrate, the SiO vapor was created, infiltrated into the graphite substrate, then, the SiC conversion layer was formed from the vapor-solid reaction of SiO and graphite. In the XRD pattern of conversion layer, it was confirmed that 3C $\beta$-SiC phase was created at 175$0^{\circ}C$ and 185$0^{\circ}C$. Also, in the back scattered image of cross-sectional conversion layer, it was found that the conversion layer was easily formed at 185$0^{\circ}C$, the interface of graphite substrate and SiC layer was observed. It was though that the coke particle size and density of graphite substrate mainly affect the XRD pattern and microstructure of SiC conversion layer. In the oxidation test of 100$0^{\circ}C$, the SiC converted graphites exhibited good oxidation resistance compared with the unconverted graphites.

• Journal of the Korean institute of surface engineering
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• v.29 no.1
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• pp.3-14
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• 1996

High temperature anneal of W-rich silicides, inferior to adherence compared with Si-rich silicides, resulted in the film peeling off from the Si-substrate when WSix thickness reached more than critical thickness. Investigation of the W-rich silicide films peeling off from the substrate revealed that the voids underneath the $WSi_2$ produced through silicide reaction were responsible for the poor adherence of W-rich silicide. In addition, internal stress in the film increased as the silicide thickness increased. In order to promote the adhesion of WSix to Si-substrate, thin Ti-layer was formed between WSi and Si-substrate(WSix/Ti/Si). No voids were observed in $WSi_2$/Ti/Si $N_2$-annealed at $1000^{\circ}C$, thereby leading to an increase of the critical thickness from ～1700$\AA$ to more than 2500$\AA$. However, higher resisiti-vity was obtained in WSix/Ti/Si than in WSix/Si. Finally, different silicide reaction mechanism for the structures(WSix/Si, WSix/Ti/Si) was proposed to explain the formation of voids as well as the role of thin Ti-layer.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.1
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• pp.14-19
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• 1999

Using a single precursor of hexamethyldisilane $(Si_{2}(CH_{3})_{6})$, $\beta$-SiC film was successfully deposited on a Si substrate at $1100^{\circ}C$ by a chemical vapor deposition method. Selectivity of SiC deposition on a Si substrate partially covered with a masking material was investigated by introducing HCl gas into hexamethyldisilane/$H_{2}$ gas system during the deposition. The schedule of the precursor and HCl gas flows was modified so that the selectivity of SiC deposition between a Si substrate and a mask material should be improved. It was confirmed that the selectivity of SiC deposition was improved by introducing HCl gas. Also, the pulse gas flow technique was effective to enhance the selectivity.