• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1783-1785
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• 2001

With the 4-MJ synthetic testing facilities completed, KERI can perform the circuit breaker testing up to 420 kV, 50 kA ratings. The short-line fault test is one of the necessary test items which are required for the circuit breaker, and in order to perform the short-line fault test KERI(Korea Electrotechnology Institute) has used the "new artificial line" which has small dimension and is easy to generate the saw-tooth wave. This paper describes the following items of the new artificial line. -Description of 4-kinds of artificial lines and determination of the circuit parameter of artificial line. -TRV characteristics of saw-tooth waves for each circuit. -KERI's artificial line.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.694-696
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• 2002

Transformers together with all equipment and accessories shall be designed and constructed to withstand the mechanical and thermal stresses produced by external short circuit which include three phase, single line-to-ground, double line-to-ground and line-to-line faults etc. Generally the Short Circuit Test of transformers is tested according to the ANSI/IEEE, IEC/JEC, KS etc, in domestic. In this study, it will be showed and compared the difference of symmetrical current for short circuit test of a Pad -mounted transformer according to with ANSI /IEEE and IEC.

• 전기학회논문지
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• 제61권12호
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• pp.1953-1958
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• 2012

The major causes of electrical fire are classified to short circuit fault, overload fault, electric leakage and electric contact failure. The occurrence factor of the fire is electric arc or spark accompanied with such electric faults, specially short circuit faults. Earth Leakage Circuit Breaker (ELB) and Molded_case Circuit Breaker (MCCB), that is, Residual Current Protective Devices (RCDs) used on low voltage distribution lines cut off earth leakage and overload, but the RCD can not cut off electric arc or spark to be a major factor of electrical fire. As the RCDs which are applied in low voltage distribution panel are prescribed to rated breaking time about 30ms(KS C 4613), the RCDs can't perceive to the periodic electric arc or spark of more short wavelength level. To improve such problem, this paper proposes a prevention apparatus using the line voltage drop of neutral wire and some semiconductor switching devices. Some experimental tests of the proposed apparatus confirm the validity of the analytical results.

• 조명전기설비학회논문지
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• 제30권1호
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• pp.28-37
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• 2016

Fault locating is an important element to minimize the damage of power system. The computation error of fault locator may occur by the influence of the DC offset component during phasor extraction. In order to minimize the bad effects of DC offset component, this paper presents an improved fault location algorithm based on a DC offset removal filter for short fault in a double circuit transmission line. We have modeled a 154kV double circuit transmission line by the ATP software to demonstrate the effectiveness of the proposed fault locating algorithm. The line to line short faults were simulated and then collected simulation data was used. It can be seen that the error rate of fault locating estimation by the proposed algorithm decreases than the error rate of fault locating estimation by conventional algorithm.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 제38회 하계학술대회
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• pp.913-914
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• 2007

Power transformer shall be designed and constructed to withstand the mechanical and thermal stresses produced by external short circuits which include three-phase, single line to ground, double line-to-ground, and line-to-line faults on any one set terminals at a time. This paper presents the method of short-circuit test and means of evaluation during and after each test to judge the results of short-circuit tests.

• Journal of Power Electronics
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• 제16권1호
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• pp.362-373
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• 2016

The on-line measurement of high-power IGBT collector current is important for the hierarchical control and short-circuit and overcurrent protection of its driver and the sensorless control of the converter. The conventional on-line measurement methods for IGBT collector current are not suitable for engineering measurement due to their large-size, high-cost, low-efficiency sensors, current transformers or dividers, etc. Based on the gate driver, this paper has proposed a current measuring circuit for IGBT collector current. The circuit is used to conduct non-intervention on-line measurement of IGBT collector current by detecting the voltage drop of the IGBT power emitter and the auxiliary emitter terminals. A theoretical analysis verifies the feasibility of this circuit. The circuit adopts an operational amplifier for impedance isolation to prevent the measuring circuit from affecting the dynamic performance of the IGBT. Due to using the scheme for integration first and amplification afterwards, the difficult problem of achieving high accuracy in the transient-state and on-state measurement of the voltage between the terminals of IGBT power emitter and the auxiliary emitter (u_Ee) has been solved. This is impossible for a conventional detector. On this basis, the adoption of a two-stage operational amplifier can better meet the requirements of high bandwidth measurement under the conditions of a small signal with a large gain. Finally, various experiments have been carried out under the conditions of several typical loads (resistance-inductance load, resistance load and inductance load), different IGBT junction temperatures, soft short-circuits and hard short-circuits for the on-line measurement of IGBT collector current. This is aided by the capacitor voltage which is the integration result of the voltage uEe. The results show that the proposed method of measuring IGBT collector current is feasible and effective.

• 대한전기학회논문지:전력기술부문A
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• 제49권12호
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• pp.575-580
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• 2000

Switching of the transmission lines(T/L) is one of the ways for suppressing the short circuit capacity. This paper presents the extended optimal power flow(OPF) to the problem of selecting the T/Ls to be open. The constraints of the short circuit currents within limits are added to the inequalities of OPF. Also, the overload on the other lines due to switching of T/Ls is avoided by the linearized inequalities. The number of the open lines can be minimized by incorporating into the objective function of OPF in order to maintain reliability. The method of an effective calculation of the extended OPF is also proposed in this paper, which makes the two parts decoupled. The one concerning the generation dispatch is solved in the first place by the conventional method. Secondly, the other concerning the line-switching is optimized by the proposed formulation.

• 조명전기설비학회논문지
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• 제21권7호
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• pp.20-28
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• 2007

본 논문에서는 2회선 가공송전선에 대하여 2회선 중 1회선에 고장이 발생한 경우에 안전하게 운전할 수 있는 단시간정격을 결정하기 위한 해석적 방법을 기술한다. 도체의 온도특성을 나타내는 열평형방정식을 선형화 함으로써 이 선형방정식으로 1회선 선로에 과부하가 발생하는 동안 과전류와 그 온도 특성을 쉽게 표현할 수 있다. 일반적으로 단시간 선로정격은 도체의 수명과 이도를 동시에 고려하여 결정해야 한다는 것은 잘 알려진 사실이다. 그렇지만 대부분의 전력회사는 단시간정격에 대한 각자의 다른 지침을 갖고 있다. 이 논문에서는 제안된 방법을 사용하면 과거 3시기에 건설된 한국전력공사의 가공송전선에 규정된 단시간정격을 재평가할 수 있고, 그 결과 단시간정격을 효율적으로 증대시킬 수 있음을 확인하였다. 또한 이 방법은 2회선 선로 중 1회선에 고장이 발생할 경우에 기존 선로에 어떤 조치도 하지 않아도 단시간 동적송전용량을 결정하는데 직접 이용할 수 있을 것이다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 C
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• pp.1186-1188
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• 1999

When we perform the test related to the power distribution system such as artificial fault test, protective coordination test, distribution automation test in short length test line, Lumped Constant Circuit, a kind of variable impedance, should be attached to the test line in order to make it equivalent to a real line in length electrically. In this paper we designed the positive sequence and zero sequence Lumped Constant Circuit with optimized inductor and resister for the modification of long, 16km, distribution line, when they are attached to the short, 4km, distribution test line.

• 한국통신학회논문지
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• 제24권9A호
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• pp.1434-1441
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• 1999

본 논문에서는 Hairpin Line 여파기의 정확한 해석 및 설계를 위한 등가회로를 제시하였으며 제시된 등가회로의 유효성을 컴퓨터 시뮬레이션과 설계를 통해 입증하였다. Hairpin Line 여파기에 대한 설계식은 다양하게 제시되었으나, 인접하지 않는 소자간의 상호 연결성을 포함한 실제적으로 간단화된 등가회로는 아직 명시되고 있지 못하다. 본 논문에서는 회로 duality을 이용하여 Hairpin Line 여파기 회로의 모든 개방단자를 단락단자로 변환하고, 변환된 회로를 그래프 모델로 표시하였다. 또한 각 단자에서의 경계조건으로부터 보다 간략화된 회로모델을 구하고 역 dual구조로 변환하여 Hairpin Line 여파기에 대한 간단화된 등가회로를 유도하였다.