• Journal of Sensor Science and Technology
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• v.30 no.5
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• pp.342-348
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• 2021

For the characterization or failure analysis of electronic devices such as PCB (printed circuit boards), the most common method is the measurement of voltage waveforms with an oscilloscope. However, because there are many types of problems that cannot be detected by voltage waveform analysis, several other methods such as X-ray transmission, infrared imaging, or eddy current measurement have been applied for these analyses. However, these methods have also been limited to general analyses because they are partially useful in detecting physical defects, such as disconnections or short circuits. Fundamentally current waveform measurements during the operation of electronic devices need to be performed, however, commercially available current sensors have not yet been developed, particularly for applications in highly integrated PCB products with sub-millimeter fine pitch. In this study, we developed a highly sensitive PHR (planar hall resistance) magnetic sensor for application in highly integrated PCBs. The developed magnetic sensor exhibited sufficient features of an ultra-small size of less than 340 ㎛, magnetic field resolution of 10 nT, and current resolution of 1 mA, which can be applicable for PCB analyses. In this work, we introduce the development process of the magnetic sensing probe and its characteristic results in detail, and aim to extend this pin-type current probe to applications such as current distribution imaging of PCBs.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.35 no.11
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• pp.1139-1145
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• 2011

An automated anastomotic ring-pin system consisting of both the anastomotic ring-pin system and the coupler device has eliminated the drawbacks of the suture method. High density polyethylene (HDPE), a material with outstanding biocompatibility and injection molding capability, was used in the ring. SUS316 stainless steel, Ti-6Al-4Nb, Ti-6Al-4V, and unalloyed titanium were used in FEM simulations of the micropin. The authors categorized the microvascular anastomotic ring micropins into short neck (SN) and long neck (LN) groups in order to evaluate the effect of the micropin's fillet radius and neck length on the von Mises stress. The micropins were further divided into those with and without fillet. On the basis of the fillet radius rate (FRR), which represents the rate of change in the von Mises stress with respect to the availability and shape of the fillet, and the neck length rate (NLR), which represents the rate of change in the von Mises stress with respect to changes in the length of the neck within the fillet shape, it can be concluded that the SN-3 neck design is the most stable.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.347-351
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• 2004

[ $Si_3N_4$ ] composites have been extensively studied for engineering ceramics, because it has excellent room and high temperature strength, wear resistance properties, good resistance to oxidation, and good thermal and chemical stability. In the present work, carbon short fiber reinforced $Si_3N_4$ ceramics were fabricated by hot press method in $N_2$ atmosphere at $1800^{\circ}C$ using $Al_2O_3\;and\;Y_2O_3$ as sintering additives. Content of carbon short fiber was $0\%,\;0.1\%\;and\;0.3\%$. The composites were evaluated in terms of density, flexural strength and elastic modulus through the 3-point bending test at room temperature. Also, The wear behavior was determined by the pin on disk wear tester using silicon nitride ball. Experimental density and flexural strength decreased with increasing content of carbon fiber. But specific modulus increased with increasing content of carbon fiber. In addition, friction coefficient and specific wear loss decreased with increasing content of carbon short fiber by reason of interfacial defects between matrix and fiber.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.571-573
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• 2004

본 논문에서는 휴대용 선량계 시스템에 거리 무선 통신 방식중 Bluetooth를 이용하여 선량계를 구현한 것에 대해 논하였다. 휴대용 선량계란 감마선과 속중성자 및 열중성자를 현장에서 실시간으로 측정 할 수 있는 기기이다. 휴대용 선량계는 선랑계의 소형화를 위해 모듈별로 구성하여 공간의 최적화를 취하였다. 모듈의 구성은 시스템의 전반적인 제어를 하는 CPU부 센서로부터 측정한 데이터를 처리하는 신호처리부 방사선량을 측정하는 센서부로 구성되어졌다. 센서 모들의 PIN 다이오드와 MODFET 센서를 이용하여 감마선, 속중성자, 열중성자를 측정한다. 휴대용 선량계를 관리하고 측정한 데이터의 백업 및 분석을 위하여 PC용 관리프로그램과 근거리 무선 통신(Bluetooth)을 사용하여 통신하도록 만들어 사용하였다. 측정 지역의 방사선량을 휴대용 선량계로 측정하여 PC용 관리프로그램에서 실시간으로 방사선량을 확인 할 수 있다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.8
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• pp.382-386
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• 2001

Presently, typical maximum probe spacing of soil resistivity survey(Wenners 4 pin method) is 20 m in case of 154 K substation grounding design of KEPCO. This paper examined the effects of maximum probe spacing of wenner method on the equivalent soil modeling and the accuracy of grounding resistance measurement by comparing the calculated FOP(Fall-of-Potential) curves of various soil models with the measured one at 154kV H substation. The comparison results showed that the inaccurate estimation of deep soil resistivity, which is caused from the short probe spacing of soil resistivity survey, can produce large errors on measurement of grounding resistance. In this paper a quantitative analysis of FOP at H substation has been presented.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.11
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• pp.128-139
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• 1996

In this paper, we propose an algorithm to solve the problem of placement of rectangular blocks whose sizes and shpaes are pre-determined. The proposed method solves the placement of many retangular blocks of different sizes and shapes in a hierarchical manner, so as to minimize the chip area. The placement problem is divided into several sub-problems: hierarchical partioning, hierarchical area/shape estimation, hierarchical pattern pacement, overlap removal, and module rotation. After the circuit is recursively partitioned to build a hierarchy tree, the necessary wiring area and module shpaes are estimated using the resutls of the partitioning and the pin information before the placement is performed. The placement templaes are defined to represent the relative positions of the modules. The area and the connectivity are optimized separately at each level of hierachy using the placement templates, so the minimization of chip area and wire length can be achieved in a short execution time. Experiments are made on the MCNC building block benchmark circuits and the results are compared with those of other published methods. The proposed technique is shown to produce good figures in tems of execution time and chip area.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2008.05a
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• pp.7-9
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• 2008

ITO thin film is generally fabricated by various. methods such as spray, CVD, evaporation, electron gun deposition, direct current electroplating, high frequency sputtering, and reactive DC sputtering. However, some problems such as peaks, bumps, large particles, and pin-holes on the surface of ITO thin film were reported, which caused the destruction of color quality, the reduction of device life time, and short-circuit. Chemical mechanical polishing (CMP) process is one of the suitable solutions which could solve the problems

• The Transactions of the Korean Institute of Electrical Engineers
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• v.38 no.1
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• pp.68-77
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• 1989

In this paper, a design approch is presented for a concurrent self-diagnosable microprocessor. An efficient diagnostic procedure to dynamically test the processor functional units decomposed by each insturction, concurrently with a program under execution is suggested. The basic goals of the proposed design approach are the low hardware overhead, no increase in the pin count and the minimal change of the initial design concepts on conventional microprocessors. The results of the performance of the suggested self-diagnosing hardware for an 8080 type microprocessor show that the suggested diagnosis scheme would be efficiently applicable, since diagnosing the processor functional units can be completed in a reasonably short time with the execution of an arbitrarily chosen sample program.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1357-1358
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• 2006

Indium tin oxide (ITO) thin film is a transparent electrode, which is widely applied to solar battery, illuminators, optical switches, liquid crystal displays (LCDs), plasma display panels (PDPs), and organic light emitting displays (OLEDs) due to its easy formation on glass substrates, goof optical transmittance, and good conductivity. ITO thin film is generally fabricated by various methods such as spray, CVD, evaporation, electron gun deposition, direct current electroplating, high frequency sputtering, and reactive DC sputtering. However, some problems such as peaks, bumps, large particles, and pin-holes on the surface of ITO thin film were reported, which caused the destruction of color quality, the reduction of device life time, and short-circuit. Chemical mechanical polishing (CMP) processis one of the suitable solutions which could solve the problems.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.2
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• pp.440-456
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• 2011

In this paper, we introduce a novel Public Key Infrastructure (PKI) based message authentication scheme that takes advantage of temporal and spatial uniqueness in physical layer channel responses for each transmission pair in vehicular communication networks. The proposed scheme aims at achieving fast authentication and minimizing the packet transmission overhead without compromising the security requirements, in which most messages can be authenticated through an extreme fast physical-layer authentication mechanism. We will demonstrate that the proposed secure authentication scheme can achieve very short message delay and reduced communication overhead through extensive analysis and simulation.