• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.68-75
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• 2007

A single chip NFC transceiver supporting not only NFC active and passive mode but also 13.56MHz RFID reader and tag mode was designed and fabricated. The proposed NFC transceiver can operate as a RFID tag even without external power supply which has dual antenna structure for initiator and target. The area increment due to additional target antenna is negligible because the target antenna is constructed by using a shielding layer of initiator antenna. The analog front end circuit of the proposed NFC transceiver consists of a transmitter and receiver of reader/writer block supporting NFC initiator or RFID reader mode, and a tag circuit for target of passive NFC mode or RFID tag mode. The maximum baud rate of the proposed NFC device is 212kbps by using UART serial interface. The chip has been designed and fabricated using a Magnachip's $0.35{\mu}m$ double poly 4-metal CMOS process, and the effective area of the chip is 2200um by 3600um.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.3
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• pp.253-259
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• 2003

This paper aims at developing remote control system to control and monitor distributed various devices such as UPS through internet. TCP/IP(Transmission Control Protocol/Internet Protocol) and UPS operated in a row are adopted for the network management protocol and the application device, respectively. For controlling and monitoring distributed devices in realtime, java-environment software is constructed. Also, HelloDevice, general-use interface controller between network device and applied device is proposed. Finally, serial communication such as RS-232C is used between controller and applied device.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.27-34
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• 2005

In this paper, FPGA It/w and S/W Embedded system for LDM remote control is implemented. XScale CPU is used on developed system and in communcation ethenet and serial is used. CPU interface with H/W LDM rotation and to drive LDM FPGA logic is implemented, to transmit LDM data from long distance command packet is composed, for S/W Embedded linux is used to design linux device driver and linux application program. This S/W is run by module so by loading this module to linu)( file system it can do any movement. Also by compiling Embedded linux to the system it can lower the price of the system. By using this H/W and S/W theory it can be used on any other embedded system.

• Journal of the Korean Society for Nondestructive Testing
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• v.35 no.2
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• pp.128-133
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• 2015

This paper describes the construction of a static 3D ultrasonography image by tracking the radiation beam position during the handy operation of a 1D array probe to enable point-of-care use. The theoretical model of the transformation from the translational and rotational information of the sensor mounted on the probe to the reference Cartesian coordinate system was given. The signal amplification and serial communication interface module was made using a commercially available sensor. A test phantom was also made using silicone putty in a donut shape. During the movement of the hand-held probe, B-mode movie and sensor signals were recorded. B-mode images were periodically selected from the movie, and the gray levels of the pixels for each image were converted to the gray levels of 3D voxels. 3D and 2D images of arbitrary cross-section of the B-mode type were also constructed from the voxel data, and agreed well with the shape of the test phantom.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.10
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• pp.2450-2456
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• 2015

In this paper, we propose a real-time remote monitoring system for distributed solar power generation system. The proposed system consists of PVC, UTC, OTC and monitoring server. PVC collects the operational information from the PV's inverter via serial interface. The sensing data is transmitted to the server by wireless communications and stored in the DB server. The PV's status is monitored via UTC, and the operating of PVC and UTC are managed by OTC. In addition, by providing information about the power generated by PV system and failure diagnosis in real time, the proposed system shows the possibility of reducing the maintenance costs and improved failure recovery time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.897-900
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• 2007

This paper presents a study on the DSP controller and IGBT inverter driver design for the power-by-wire(PBW) system using BLDC servo motor. This BLDC servo motor system was realized with DSP(Digital Signal Processor) and IGBT inveter module. The PBW system needs speed control of servo motor for linear thrust action. This paper implements a servo controller with vector control and min-max PWM technique. As CPU of controller, TMS320F2812 DSP was adopted because it has PWM(Pulse Width Modulation) waveform generator, A/D(Analog to Digital) converter, SPI( Serial Peripheral Interface) port and many input/output port etc.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.1B
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• pp.19-25
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• 2006

It's for USB to be used more frequently than another I/O devices. The Universal Serial Bus is the most successful interface in PC history. It's already the do facto interconnect for PCs, and has proliferated into consumer electronics(CE) and mobile devices as well. USB has built on many killer applications, many CE devices, many interfaces. The tangle of wires among the number of devices in your home demands wireless technology. If our devices is unwired, it solves the tangle of wires. In this paper we want to use Legacy USB functionalities, portabilities, multimedia capabilities with wireless interconnection. This paper is related to a study of USB implementation without wires. This paper is related to make the hub function of USB cordless, so it will connect host with devices without wires. In case making USB wireless, it must support the above functionalities. Moreover, It needs the data structure and the resources for host functionalities, e.g. ETD(Endpoint Transfer Descriptor), data memory. This will benefit a convenient use of USB.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2002.02a
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• pp.285-291
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• 2002

The shearing process for the sheet metal is normally used in the precision elements such as a frame of TFT-LCD or lead frame of If chips. In these precision elements, the burr formation prevents the system assembly and needs the additional burr removing process. In this paper, we developed the small size NC punching system which has an aligning kinematics between the rectangular shaped punch and die. The punch is driven by an ai cylinder and the sheet metal is moving on the X-Y table system which is driven by two stewing motors. The microprocessor control the whole system and communicate with the monitoring PC by RS232C serial communication protocol. The graphic user interface program in PC monitors nil control the punching system. The cross shaped joint hinge supports the punching die and positioned by two differential screws, whose are installed in perpendicular directions. The aligning between the punch and die is performed using the sheets of half thickness(0.1mm Brass) of the real process for the frame of the TFT-LCD. Using half thickness Brass, the burr formation is magnified and we can decide the aligning direction more easily then using the real thickness(0.2mm) Aluminum. In this paper, the aligning results are measured manually using the SEM photographs and we hope to make the automated aligning procedures using some kinds of image processing techniques.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.1
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• pp.81-90
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• 2000

Parallel manipulator is suitable for the high precise task because it than has higher stiffness, larger load capacity and more excellent precision, due to the closed-lop structure, than serial manipulator. But the controller design for parallel manipulator is difficult because the parallel manipulator has both the complexity of structure and the interference of actuators. The precision improvement of parallel manipulator using a classical linear control scheme is difficult because the parallel manipulator has the tough nonlinear characteristics. In this paper, firstly, the kinematic analysis of a parallel manipulator used at the experiments is performed so as to show the controllability. The analysis of internal singular configuration of the workspace is performed using the kinematic isotropic index so a sto show the limitation of control performance of a simple linear controller with fixed control gains. Secondly, a control scheme is designed by using an adaptive fuzzy logic controller so that active joints of the parallel manipulator track more precisely the desired input trajectory. This adaptive fuzzy logic controller so that active joints of the parallel manipulator track more precisely the desired input trajectory. This adaptive fuzzy logic controller is often used for the control of nonlinear system because it has both the inference ability and the learning ability. Lastly, the effeciency of designed control scheme is demonstrated by the real-time control experiments with IBM PC interface logic H/W and S/W of my won making. The experimental results was a success.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.62-70
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• 2007

In this paper, we design a mobile camera processor to support the MIPI CSI-2 and DPHY specification. The lane management sub-layer of CIS2 handles multi-lane configuration. Thus conceptually, the transmitter and receiver have each independent buffer on multi lanes. In the proposed architecture, the independent buffers are merged into a single common buffer. The single buffer architecture can flexibly manage data on multi lanes though the number of supported lanes are mismatched in a camera processor transmitter and a host processor. For a key issue for the data synchronization problem, the synchronization start codes are added as the starting for image data. We design synchronization logic to synchronize the received clock and to generate the byte clock. We present the verification results under proposed test bench. And we show the waves of simulation and logic synthesis results of the designed processor.