• Title/Summary/Keyword: Sequential Control

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Corrective Control of Input/Output Asynchronous Sequential Machines for Overcoming Disturbance Inputs (외란 입력을 극복하기 위한 입력/출력 비동기 머신의 교정 제어)

  • Yang, Jung-Min;Kwak, Seong-Woo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.3
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    • pp.591-597
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    • 2009
  • The problem of controlling a finite-state asynchronous sequential machine is examined. The considered machine is governed by input/output control, where access to the state of the machine is not available. In particular, disturbance inputs can infiltrate into the asynchronous machine and provoke unauthorized state transitions. The control objective is to use output feedback to compensate the machine so that the closed-loop system drive the faulty asynchronous machine from a failed state to the original one. Necessary and sufficient condition for the existence of appropriate controllers are presented in a theoretical framework. As a case study, the closed-loop system of an asynchronous machine with the proposed control scheme is implemented in VHDL code.

State Feedback Control of Asynchronous Sequential Machines with Uncontrollable Inputs: Application to Error Counters (제어 불능 입력이 존재하는 비동기 순차 머신의 상태 피드백 제어 및 오류 카운터로의 응용)

  • Yang, Jung-Min;Kwak, Seong-Woo
    • Journal of Institute of Control, Robotics and Systems
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    • v.15 no.10
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    • pp.967-973
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    • 2009
  • The model matching problem of asynchronous sequential machines is to design a corrective controller such that the stable-state behavior of the closed-loop system matches that of a prescribed model. In this paper, we address model matching when the external input set consists of controllable inputs and uncontrollable ones. Like in the frame of supervisory control of Discrete-Event Systems (DES), uncontrollable inputs cannot be disabled and must be transmitted to the plant without any change. We postulate necessary and sufficient conditions for the existence of a corrective controller that solves model matching despite the influence of uncontrollable events. Whenever a controller exists, the algorithm for its design is outlined. To illustrate the physical meaning of the proposed problem, the closed-loop system of an asynchronous machine with the proposed control scheme is implemented in VHDL code.

Fault-Tolerant Control of Input/Output Asynchronous Sequential Circuits with Transient Faults Violating Fundamental Mode (기본 모드를 침해하는 과도 고장이 존재하는 입력/출력 비동기 순차 회로에 대한 내고장성 제어)

  • Yang, Jung-Min;Kwak, Seong-Woo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.3
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    • pp.399-408
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    • 2022
  • This paper proposes a corrective control system to achieve fault-tolerant control for input/output asynchronous sequential circuits vulnerable to transient faults violating fundamental mode operations. To overcome non-fundamental mode faults occurring in transient transitions of asynchronous sequential circuits, it is necessary to determine the end of unauthorized state transitions caused by the faults and to stably take the circuit from the faulty state to a desired state that is output equivalent with the normal next stable state. We address the existence condition for a proper output-feedback corrective controller that achieves fault diagnosis and fault-tolerant control for these non-fundamental mode faults. The corrective controller and asynchronous sequential circuit are implemented on field-programming gate array to demonstrate the synthesis procedure and applicability of the proposed control scheme.

Optimal Control of Large-Scale Dynamic Systems using Parallel Processing (병렬처리를 이용한 대규모 동적 시스템의 최적제어)

  • Park, Ki-Hong
    • Journal of Institute of Control, Robotics and Systems
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    • v.5 no.4
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    • pp.403-410
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    • 1999
  • In this study, a parallel algorithm has been developed that can quickly solve the optiaml control problem of large-scale dynamic systems. The algorithm adopts the sequential quadratic programming methods and achieves domain decomposition-type parallelism in computing sensitivities for search direction computation. A silicon wafer thermal process problem has been solved using the algorithm, and a parallel efficiency of 45% has been achieved with 16 processors. Practical methods have also been investigated in this study as a way to further speed up the computation time.

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Study on the method of Block processing by SFC (SFC에 의한 권역별 처리 방법에 관한 연구)

  • You, Jeong-Bong
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.273-275
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    • 2006
  • Ladder Diagram(LD) is the most widely utilized among many sorts of existing programs using for the design of process control system. But it is very difficult to grasp sequential flow of control logic. In this paper, we proposed the method that we can control a lot of blocks. We used PLC in process control system. And, in order to design we used Sequential Function Chart(SFC). In this paper, we proposed the method of block contro. and confirmed feasibility through a simulation.

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A Study on Construction of the Advanced Sequential Circuit over Finite Fields

  • Park, Chun-Myoung
    • Journal of Multimedia Information System
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    • v.6 no.4
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    • pp.323-328
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    • 2019
  • In this paper, a method of constructing an advanced sequential circuit over finite fields is proposed. The method proposed an algorithm for assigning all elements of finite fields to digital code from the properties of finite fields, discussed the operating characteristics of T-gate used to construct sequential digital system of finite fields, and based on this, formed sequential circuit without trajectory. For this purpose, the state transition diagram was allocated to the state dependency code and a whole table was drawn showing the relationship between the status function and the current state and the previous state. The following status functions were derived from the status function and the preceding table, and the T-gate and the device were used to construct the sequential circuit. It was confirmed that the proposed method was able to organize sequential digital systems effectively and systematically.

Corrective Control of Asynchronous Sequential Machines for Nondeterministic Model II: Controller Design (비결정 모델에 대한 비동기 순차 회로의 교정 제어 II: 제어기 설계)

  • Yang, Jung-Min
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.45 no.4
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    • pp.11-19
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    • 2008
  • The problem of controlling asynchronous sequential machines is addressed in this paper Corrective control means to make behavior of an asynchronous sequential machine equal to that of a given model. The main objective is to develope a corrective controller, especially when a model is given as nondeterministic, or a set of reference models. We first review representation of nondeterministic models and model matching problems with nondeterministic models, which are presented in the companion paper. We then propose necessary and sufficient conditions for the existence of corrective controllers and describe their design procedure. To show the applicability, the proposed control scheme is demonstrated in an example.

PCRAM Flip-Flop Circuits with Sequential Sleep-in Control Scheme and Selective Write Latch

  • Choi, Jun-Myung;Jung, Chul-Moon;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.1
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    • pp.58-64
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    • 2013
  • In this paper, two new flip-flop circuits with PCRAM latches that are FF-1 and FF-2, respectively, are proposed not to waste leakage during sleep time. Unlike the FF-1 circuit that has a normal PCRAM latch, the FF-2 circuit has a selective write latch that can reduce the switching activity in writing operation to save switching power at sleep-in moment. Moreover, a sequential sleep-in control is proposed to reduce the rush current peak that is observed at the sleep-in moment. From the simulation of storing '000000' to the PCRAM latch, we could verify that the proposed FF-1 and FF-2 consume smaller power than the conventional 45-nm FF if the sleep time is longer than $465{\mu}s$ and $95{\mu}s$, respectively, at $125^{\circ}C$. For the rush current peak, the sequential sleep-in control could reduce the current peak as much as 77%.

A Novel Hybrid Sequential Start Control System for Large Inductive Loads

  • Kim, Sang-Kon;Kim, Tae-Kon
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.388-394
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    • 2015
  • The inrush current of a large inductive load can be reduced with a soft starter; however, the large inrush current caused by simultaneous bulk starts (SBSs) cannot be effectively reduced. In order to reduce the high inrush current and voltage sag owing to the SBSs of large capacity inductive loads within a power network, a novel hybrid sequential start control system is proposed, implemented on embedded systems, and evaluated with a testbed in this study. From the experimental and simulation results of the proposed control system, the inrush current could be effectively restricted below the maximum current capacity of a power distributing board. Moreover, with the proposed system, power cost typically dictated by the peak power consumption can be fairly reduced, and the quality of the power system connected to the inductive loads can be efficiently increased.

Time Optimal Performance of a Varying-Time Sharing Sequential Paired Thrusting Logic (순차적 가변시간할당 추력방식 최적성능 분석)

  • Oh, Hwa-Suk;Lee, Byung-Hoon;Lee, Bong-Un
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.3
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    • pp.254-261
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    • 2005
  • Time-optimal performances are analyzed in the sense of inner loop. A varying-time sharing thrusting logic is suggested as a new sequential paired thrusting logic for fast maneuvers of satellites with coupled thruster configuration. Its time-optimal maneuvering performance is compared with two conventional thrusting logics: separate thrusting logic and constant-time sharing sequential paired thrusting logic. It is found that the newly suggested varying-time sharing thrusting logic can be easily implemented by adjusting the conventional constant-time logic with its thrust on-time, while it can reduce the maneuvering time enormously as much as the separate thrusting logic. The performance of the logic is simulated on the agile maneuvering spacecraft model KOMPSAT-II.