• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.51-54
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• 2006

본 연구는 CMP 공정 중의 Conditioning 최적화에 관한 내용이다. CMP Pad Conditioner의 역할은 CMP 공정 중 Slurry 및 연마 잔유물에 의해 Pad 표면에 눈막힘 현상(Glazing)이 발생하여 Wafer의 연마속도가 급속히 저하되는 현상을 방지하여 공정의 안정성을 향상시키는 데 있다. 본 연구 중 Conditioning은 In-situ 방식으로 진행되었으며, Conditioning 비율을 Polishing Time 대비 50%만 진행하여도 연마속도 저하현상은 나타나지 않음을 확인하였다. 이로써 Pad 마모랑 감소 및 Conditioner 교체 주기연장이 가능해져, CMP 공정의 Cost를 절감할 수 있다.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.45 no.4
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• pp.86-98
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• 2022

Recently, many studies have been conducted to improve quality by applying machine learning models to semiconductor manufacturing process data. However, in the semiconductor manufacturing process, the ratio of good products is much higher than that of defective products, so the problem of data imbalance is serious in terms of machine learning. In addition, since the number of features of data used in machine learning is very large, it is very important to perform machine learning by extracting only important features from among them to increase accuracy and utilization. This study proposes an anomaly detection methodology that can learn excellently despite data imbalance and high-dimensional characteristics of semiconductor process data. The anomaly detection methodology applies the LIME algorithm after applying the SMOTE method and the RFECV method. The proposed methodology analyzes the classification result of the anomaly classification model, detects the cause of the anomaly, and derives a semiconductor process requiring action. The proposed methodology confirmed applicability and feasibility through application of cases.

• IE interfaces
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• v.25 no.2
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• pp.170-177
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• 2012

Process control is essential to operate the semiconductor process efficiently. This paper consider fault classification of semiconductor based cyclic signal for process control. In general, process signal usually take the different pattern depending on some different cause of fault. If faults can be classified by cause of faults, it could improve the process control through a definite and rapid diagnosis. One of the most important thing is a finding definite diagnosis in fault classification, even-though it is classified several times. This paper proposes the method that one-class classifier classify fault causes as each classes. Hotelling T2 chart, kNNDD(k-Nearest Neighbor Data Description), Distance based Novelty Detection are used to perform the one-class classifier. PCA(Principal Component Analysis) is also used to reduce the data dimension because the length of process signal is too long generally. In experiment, it generates the data based real signal patterns from semiconductor process. The objective of this experiment is to compare between the proposed method and SVM(Support Vector Machine). Most of the experiments' results show that proposed method using Distance based Novelty Detection has a good performance in classification and diagnosis problems.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.141-157
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• 2001

Highly reliable packaged 64kbit ferroelectric memories with $0.8{\;}\mu\textrm{m}$ CMOS ensuring ten-year retention and imprint at 125^{\circ}C$ have been successfully developed. These superior reliabilities have resulted from steady integration schemes free from the degradation, due to layer stress and attacks of process impurities. The resent results of research and development for ferroelectric memories at Hynix Semiconductor Inc. are summarized in this invited paper.

• Ceramist
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• v.22 no.4
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• pp.429-451
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• 2019

Quartz glass is a key material for making semiconductor process components because of its purity, low thermal expansion, high UV transmittance and relatively low cost. Domestic quartz glass has a market worth about 500 billion won in 2018, and the market power of Japanese materials is very high. Quartz glass for semiconductor process can be divided into general process and exposure. For general process, molten quartz glass is mainly used, but synthetic quartz glass with higher purity is preferred. Synthetic quartz glass is used as the photomask for the exposure process. Recently, as semiconductors started the sub-nm process, the transition from the transmission type using ArF ultraviolet (194 nm) to the reflection type using EUV ultraviolet (13.5 nm) began. Therefore, the characteristics required for the synthetic quartz glass substrates used so far are also rapidly changing. This article summarizes the current technical trends of quartz glass and recent technical issues. Lastly, the present situation and development possibility of quartz glass technology in Korea were diagnosed.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2003.12a
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• pp.154-159
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• 2003

Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.981-983
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• 2003

Using the conventional standard CMOS logic process, the high voltage MOSFET to drive top emission OLEDs was fabricated for the silicon-based organic electroluminescent display. The drift region of the conventional high voltage MOSFET was implemented by the n-well of the logic process. The measurement result shows a good saturation characteristic up to 50 V without breakdown phenomena.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.543-544
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• 2008

In the fabrication of inverted top emission organic light emitting diodes (ITOLEDs), the organic layers are damaged by high-energy plasma sputtering process for transparent top anode. In this study, the plasma process induced damages on metal oxide hole injection layers (HILs) including $WO_3$, $MoO_3$, and $V_2O_5$ as buffer layer are examined. With the result of IV characteristic of hole-only devices, we propose that $MoO_3$ and $V_2O_5$ are stable materials against plasma sputtering process.

• Journal of Information Technology Applications and Management
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• v.15 no.1
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• pp.243-260
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• 2008

To prevent low yields in the semiconductor industry is crucial to the success of that industry. However, to prevent low yields is difficult because of too many factors to affect yield variation and their complex relation in the semiconductor manufacturing process. This study presents a new efficient detection methodology for detecting abnormal yields including high and low yields, which can forecast the yield level of a production unit (namely a lot) based on yield-related feature variables' behaviors. In the methodology, we use C5.0 to identify the yield-related feature variables that are the combination of correlated process variables associated with yield, use SOM (Self-Organizing Map) neural networks to extract and classify significant patterns of past abnormal yield lots and finally use C5.0 to generate classification rules for detecting abnormal yield lot. We illustrate the effectiveness of our methodology using a semiconductor manufacturing company's field data.

• IE interfaces
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• v.21 no.2
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• pp.141-150
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• 2008

In this paper, an efficient control method for semiconductor fabrication process is presented. Generally, control is performed with data which is under the influence of process disturbance. EWMA is one of the most popular control methods in semiconductor fabrication that effectively deals with varying process condition. A new method using EWMA, called the Dual Damping EWMA, is presented in this study to reduce over-control by separating weight factor of input and output. The goal is to reflect Drift but reduce the effects of White noise in run to run control. Simulation is performed to evaluate the performance of DPEWMA and to compare with EWMA and Double EWMA.