• Journal of the Semiconductor & Display Technology
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• v.10 no.3
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• pp.15-19
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• 2011

The performance of the DRAM is strongly dependent on the purity and surface roughness of the TIT (TiN/Insulator/ TiN) capacitor electrodes. Hence, in the present study, we evaluate the effects of organic contamination and change of surface roughness on the cylindrical TIT capacitor electrodes during the wet cleaning process by various analytical techniques such as TDMS, AFM, XRD and V-SEM. Once the sacrificial oxide and PR (Photo Resist) are removed by HF, the organic contamination and surface oxide films on the bottom Ti/TiN electrode become visible. With prolonged HF process, the surface roughness of the electrode is increased, whereas the amount of oxidized Ti/TiN is reduced due to the HF chemicals. In the 80nm DRAM device fabrication, the organic contamination of the cylindrical TIT capacitor may cause defects like SBD (Storage node Bridge Defect). The SBD fail bit portion is increased as the surface roughness is increased by HF chemicals reactions.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.45-51
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• 2012

Multilayer co-extrusion blown film construction is a popular technique for producing plastic films for various packaging industries. Automated detection of defective films can improve the quality of film production process. In this paper, we propose a film inspection system that can detect and classify film defects robustly. In our system, first, film images are acquired through a high speed line-scan camera under an appropriate lighting system. In order to detect and classify film defects, an inspection algorithm is developed. The algorithm divides the typical film defects into two groups: intensity-based and texture-based. Intensity-based defects are classified based on geometric features. Whereas, to classify texture-based defects, a texture analysis technique based on local binary pattern (LBP) is adopted. Experimental results revealed that our film inspection system is effective in detecting and classifying defects for the multilayer co-extrusion blown film construction line.

• Journal of the Semiconductor & Display Technology
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• v.12 no.2
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• pp.67-72
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• 2013

Temperature is a critical parameter in yield improvement for wafer manufacturing. In chemical vapor deposition (CVD) equipment, crack defect in ceramic heater leads to yield reduction, however, there is no suitable ceramic heater fault detection system for conventional CVD equipment. This paper proposes a short-time zero-crossing rate based fault detection method for the ceramic heater in CVD equipment. The proposed method measures the output signal ($V_{pp}$) of RF filter and extracts the zero-crossing rate (ZCR) as feature vector. The extracted feature vectors have a discriminant power and Gaussian mixture model (GMM) based fault detection method can detect fault in ceramic heater. Experimental results, carried out by measured signals provided by a CVD equipment manufacturer, indicate that the proposed method detects effectively faults in various process conditions.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.566-575
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• 2008

We investigated the field emission characteristics from the planar field emitters made of double-walled carbon nanotubes (DWCNTs) synthesized by a catalytic chemical vapor deposition (CCVD) method. Transmission electron microscopy, Thermogravimetric and Raman analysis showed that the carbon materials have a low defect level in their atomic carbon structure, pointing to the synthesis of high-purity DWCNTs. For field emission properties of DWCNTs, the turn-on field of DWCNTs was $1.9\;V/{\mu}m$ and the current density was about $74\;mA/cm^2$ at $8.1\;V/{\mu}m$, which is sufficient for the applications of field emission displays and vacuum microelectronic devices. The DWCNT field emitters also exhibited a uniform field emission pattern and good field emission stability in a diode configuration.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.4
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• pp.331-335
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• 2004

In this paper, we modeling the oxidation, diffusion, and ion-implantation for semiconductor process simulation, and construct the integrated framework for efficient execution and continuous process simulation. For oxidation process, to predict the accurate LOCOS shape and stress distributions, stress-dependent viscous model was performed using SVP algorithm. For diffusion process, predeposition and OED simulation was performed using point defect theory. For ion implantation, Monte-Carlo method based on TRIM simulation was performed with various process conditions. For input to each unit process, we used the dialog boxes which are windows application's standards. This dialog box allows us to verify and minimize input error at input steps. Using the combination of compiler's function and windows's API function, simulation was done with small memory size.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.46-51
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• 2023

We investigated the MoS₂ thin film layer by thermolytic deposition and applied it to the silicon solar cells. MoS₂ thin films were made by two methods of dipping and spin coating of (NH₄)₂MoS₄ precursor solution. We implemented two types of substrates of microtextured and nano-microtextured 6-in. Si pn junction wafers. The fabricated MoS₂ thin film layer was analyzed, and solar cells were fabricated by applying the standard silicon solar cell process. The MoS₂ thin film layer of sulfur-deficient form was deposited on the n-type emitter layer, and electrons, which are minority carriers, were well transported at the interface and exhibited photovoltaic solar cell characteristics. The cell efficiencies were achieved at 5% for microtextured wafers and 2.56% for nano-microtextured wafers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.59-59
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• 2009

현재 CMP분야는 광역 평탄화 반도체 소자의 집적화 및 소형화가 진행됨에 따라서 CMP 공정의 중요성은 날로 성장하고 있다. 하지만 이러한 CMP공정은 불가피하게도 scratch, pit, CMP residue와 같은 defect들을 발생시키고 있으며, 점점 선폭이 작아짐에 따라, 이러한 defect들이 반도체 수율에 미치는 영향은 심각해지고 있다. Defect들 중에 특히 scratch는 반도체에 치명적인 circuit failure를 일으키게 된다. 또한 반도체 내구성과 신뢰성을 감소시키게 되고, 누전전류를 증가시키는 등 바람직하지 못한 현상들이 생기게 된다. 본 연구에서는 scratch 와 같은 deflect들을 효율적으로 검출, 분석하고, scratch를 감소시키는데 그 목적이 있다. 본 실험을 위해 8" TEOS wafer와 commercial oxide slurry 및 friction polisher (Poli-500, G&P tech., Korea)를 사용하여 CMP 공정을 진행하였으며, CMP 공정조건은 각각 80rpm/80rpm/1psi(Platen speed/Head speed/Pressure)에서 1분 동안 연마를 한 후 scratch 발생 경향을 살펴보았다. CMP 후 wafer위에 오염되어 있는 slurry residue들을 제거하기 위해 SC-1, HF 세정을 이용하여 최적화된 post-CMP 공정기술을 제안하였다. Scratch 검출 및 분석을 위해 wafer surface analyzer (Surfscan 6200, Tencor, USA)와 optical microscope (LV100D, Nicon, Japan)를 사용하였다. CMP 공정 변수들에 따른 scratch 발생정도를 비교하였으며, scratch 발생 요인들에 따른 scratch 형태 및 발생정도를 살펴보았다. 최적화된 post-CMP 세정 조건은 메가소닉과 함께 SC-1 세정을 실시하여 slurry residue들을 제거한 후, HF 세정을 실시하여 잔여 오염물들을 제거하고 검출이 용이하도록 scratch를 확장시킬 수 있도록 제안하였으며, 100%의 particle removal efficiency (PRE)를 얻을 수 있었다. 실제 CMP 공정후 post-CMP 세정 단계별 scratch 개수를 측정한 결과, SC-1 세정 후 약 220개의 scratch가 검출되었으며, 검출되지 않았던 scratch가 HF 세정 후 확장되어 드러남에 따라 약 500개의 scratch 가 검출되었다.

• Journal of the Korean Chemical Society
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• v.39 no.3
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• pp.157-162
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• 1995

The x values and electrical conductivities of the nonstoichiometric compounds $WO_{3-x}$ have been measured in the temperature range from 350 to 700$^{\circ}C$ under oxygen partial pressure of $2{\times}10_{-1}\;to\;1{\times}10_{-5}$ atm. The enthalpy of the defect formation shows an endothermic process, and the oxygen pressure dependence of the defect formation or 1/n varies from -1/5.2 to -1/5.9. The activation energy and 1/n value for the electrical conductivity are 0.24~0.29 eV and -1/4.3~-1/7.6, respectively. The Tungsten Oxide as a n-type semiconductor has predominently defect model of singly charged oxygen vacancy at low temperature, and of doubly charged oxygen vacancy at high temperature.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1034-1037
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• 2005

The variation of shapes and related properties of ZnO nanostructures grown on the metal pattern and Si substrate have been investigated. Ni, Cr metal patterns were formed on Si (111) substrates by e-beam evaporation, and ZnO nanostructures were fabricated on it by using thermal evaporation of Zn powder in air. Growth temperature was controlled from 500 $^{\circ}$C to 700 $^{\circ}$C. When the growth temperature was relatively low, no considerable effect was found. However, UV emission intensity decreased, and Green-emission intensity, which is regarded as originated from the defect state in the ZnO nanostructure, increased as growth temperature increase. Also, the variation of nanostructure shape at high temperature (700 $^{\circ}$C) is understood in terms of the enhanced incorporation of metal vapor during the nanostructure formation.

• Journal of the Korean Society of Industry Convergence
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• v.7 no.3
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• pp.259-263
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• 2004

In the manufacture progress of LCD or semiconductor, there are used many kinds of gas like erosion gas, dilution gas, toxic gas as a progress which used these gas there are required high puritize to increase accumulation rate of semiconductor or LCD materials work progress of semiconductor or LCD it demand many things like the material which could minimize metallic dust that could be occured by reaction between gas and transfer pipe laying material, illumination of the surface, emition of the gas, metal liquation, welding etc also demand quality geting stricted. Material-Low-sulfur-contend (0.007-0010), vacuum-arc-remelt(VAR), seamless, high-purity tubing material is recommend for enhance welding lower surface defect density All wetted stainless steel surface must be 316LSS elecrto polishinged with ${\leq}0.254{\mu}m$($10.0{\mu}in$) Ra average surface finish, $Cr/Fe{\geq}1.1$ and $Cr_2O_3$ thickness ${\geq}25{\AA}$ From the AES analytical the oxide layer thickness (23.5~36 angstroms silicon dioxide equivalent) and chromum to iron ratios is similar to those generally found on electropolished stainless steel., molybdenum and silicon contaminants ; elements characteristic of stainless steel (iron, nickel and chromium); and oxygen were found on the surface Phosphorus and nitrogen are common contaminants from the electropolish and passivation steps.