• 한국전기전자재료학회논문지
• /
• 제11권6호
• /
• pp.447-452
• /
• 1998

The selective dry etching of GaAs to Al\ulcornerGa\ulcornerAs using $BCI_3/SF_6$ gas mixture in electron cyclotron resonance(ECR) plasma is investigated. A selectivity of GaAs to AlGaAs of more than 100 and maximum etch rate of GaAs are obtained at a gas ratio $SF_6/BCI_3+SF_6$ of 25%. We verified the formation of $AlF_3$ on $Al_{0.25}Ga_{0.75}As$from the Auger spectra which enhanced the etch selectivity. In order to investigate surface damage of AlGaAs caused by ECR plasma, we performed a low temperature photoluminescence(PL) measurement as a function of RF power. As the RF power. As the RF power increases, the PL intensity decreases monotonically from 50 to 100 Wand then repidly decreases until 250 W. This behavior is due to surface damage by plasma treatment. This dry etching technique using $BCI_3/SF_6$ gas mixture in ECR plasma is suitable for gate recess formation on the GaAs based pseudomorphic high electron mobility transistor(PHEMT)

• 전자공학회논문지A
• /
• 제28A권11호
• /
• pp.902-909
• /
• 1991

A reproducible selective dry etch process of GaAs/AlGaAs Heterostructures for High Electron Mobility Transistor(HEMT) Device fabrication is developed. Using RIE mode with $CCl_{2}F_{2}$ as the basic process gas, the observed etch selectivity of GaAs layer with respect to GaAs/$Al_{0.3}Ga_{0.7}$As is about 610:1. Severe polymer deposition problem, parialy generated from the use of $CCl_{2}F_{2}$ gas only, has been significantly reduced by adding a small amount of He gas or by $O_{2}$ plasma ashing after etch process. In order to obtain an optimized etch process for HEMT device fabrication, we com pared the properties of the wet etched Schottky contact with those of the dry etched one, and set dry etch condition to approach the characteristics of Schottky diode on wet etched surface. By applying the optimized etch process, the fabricated HEMT devices have the maximum transconductance $g_{mext}$ of 224 mS/mm, and have relatively uniform distribution across the 2inch wafer in the value of 200$\pm$20mS/mm.

• Journal of Power Electronics
• /
• 제14권3호
• /
• pp.488-498
• /
• 2014

This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

• 한국태양에너지학회 논문집
• /
• 제33권3호
• /
• pp.27-35
• /
• 2013

One of the most important factors that have a large influence on performance of the solar water heater system is performance of the solar collector, more detailedly, coating technology on the surface of the solar collector, which can provide high solar absorptance and low emittance. The core of the coating technology is to coat solar selective surfaces. In this study, various performance experiments are carried out using $Cr_2(SO_4)_3{\cdot}15H_2O$ coating technology. Here, IGBT(Insulated Gate Bipolar Transistor) of 5000A-15V was used as the surface processing rectifier which can stably output power and also can control voltage and current. The plating solution mainly contains black chrome$^{+3}$ concentration, H-y Conductivity, N-u Complex, NF Additive and NC-2 Wetter. Before applying the black chrome coating on the copper plate, optimal conditions are provided by using various preprocessing methods such as removal of fat, activation, electrolytic polishing, nickel strike, copper sulfate plating and bright neckel plating, and then the automatic continuous coating experiment are performed according to plating time and cathode current density. In the experiment, after the removal of fat, chemical polishing, nickel strike and activation processes as the preprocessing methods, the black chrome coating was performed in a plate solution temperature of $28^{\circ}C$ and a cathode current density of $18A/cm^2$ for 90 seconds. The thickness of chrome and nickel on the coated plate is $0.389{\mu}m$, $159{\mu}m$ respectively. As a result of the coating experiment, it showed the most excellent performance having a high solar absorptance of 98% and a low emittance of $5{\pm}1%$ when the black chrome surface had a thickness of $0.398{\mu}m$.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
• /
• pp.1119-1122
• /
• 2005

A selective deposition of Co thin films for thin film transistor gate electrode has been carried out by the growth with combination of micro-contact printing and metal organic chemical vapor deposition (MOCVD). This results in the elimination of optical lithography process. MOCVD has been employed to selectively deposit Co films on preformed OTS gate pattern by using micro-contact printing (${\mu}CP$). A hydrogenated amorphous silicon TFT with a Co gate selectively formed on SAMs patterned structure exhibited a subthreshold slope of 0.88V/dec, and mobility of $0.35cm^2/V-s$, on/off current ratio of $10^6$, and a threshold voltage of 2.5V, and thus demonstrating the successful application of the novel bottom-up approach into the fabrication of a-Si:H TFTs.

• Transactions on Electrical and Electronic Materials
• /
• 제12권4호
• /
• pp.148-151
• /
• 2011

We designed and fabricated aluminium gallium nitride (AlGaN)/GaN high electron mobility transistors (HEMTs) with stable reverse blocking characteristics established by employing a selective fluoride plasma treatment on the drainside gate edge region where the electric field is concentrated. Implanted fluoride ions caused a depolarization in the AlGaN layer and introduced an extra depletion region. The overall contour of the depletion region was expanded along the drift region. The expanded depletion region distributed the field more uniformly and reduced the field intensity peak. Through this field modulation, the leakage current was reduced to 9.3 nA and the breakdown voltage ($V_{BR}$) improved from 900 V to 1,400 V.

• 센서학회지
• /
• 제6권3호
• /
• pp.207-213
• /
• 1997

$H^{+}$ 이온에 선택적으로 감응하는 field effect transistor(pH-ISFET)를 바탕소자로 하고, 그 gate 주위에 Ag/AgCl 기준전극을 형성한 다음, 이를 둘러싼 수화젤(hydrogel)막 및 기체투과막의 이중막 구조를 가진 용존이산화탄소($CO_{2(aq)}$) 센서소자를 사진식각(photolithography)법으로 제작하였다. PVA-SbQ 혹은 PVP-PVAc/감광제 형의 광가교형 감광액은 수화젤막 형성에 적합하지 않았으나, 2-hydroxyethyl methacrylate(HEMA) 및 acrylamide를 포함하는 광중합형 감광액을 사용할 경우에는 사진식각법에 의한 수화젤막이 좋은 해상도로 얻어졌다. 기체투과막은 urethane acrylate계 UV-oligomer를 주성분으로 한 감광액을 써서 사진식각법으로 수화젤막위에 형성할 수 있었다. 또한 수화젤막 및 기체투과막을 사진식각법으로 형성할 때 N,N,N',N'-tetramethyl ethplenediamine(TED) 을 $O_{2}$ quencher로서 감광액 중에 도입함으로써 UV 노광시에 polyester film을 부착하는 번거로운 공정을 생략할 수 있음을 알았다. 이렇게 제조된 $pCO_{2}$ 센서는 수용액 중에서 $10^{-3}{\sim}10^{0}\;mol/{\ell}$의 $CO_{2}$ 농도변화에 대하여 직선적인 검정곡선(calibration curve)을 얻을 수 있었다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.385-385
• /
• 2012

A two terminal N+/P/N+ junction device to replace the conventional selective transistor was studied as a bilateral switching device for spin transfer torque (STT) MRAM based on 3D device simulation. An N+/P/N+ junction structure with $30{\times}30nm$ area requires bi-directional current flow enough to write a data by a drain induced barrier lowering (DIBL) under a reverse bias at N+/P (or P/N+ junction), and high current on/off ratio of 106. The SiGe materials are widely used in hetero-junction bipolar transistors, bipolar compensation metal-oxide semiconductors (BiCMOS) since the band gap of SiGe materials can be controlled by changing the fraction and the strain epilayers, and the drift mobility is increased with the increasing Ge content. In this work, N+/P/N+ SiGe material based junction provides that drive current is increased from 40 to $130{\mu}A$ by increased Ge content from 10~80%. When Ge content is about 20%, the drive current density of SiGe device substantially increased to 2~3 times better than Si-based junction device in case of 28 nm P length, which is sufficient current to operation of STT-MRAM.

• 통합자연과학논문집
• /
• 제4권4호
• /
• pp.311-314
• /
• 2011

Application of self-assembled monolayers (SAMs) to the fabrication of organic thin film transistor has been recently reported very often since it can help to provide ohmic contact between films as well as to form simple and effective electrode pattern. Accordingly, quality of these ultra-thin films is becoming more imperative. In this study, in order to manufacture a high quality SAM pattern, a hydrophobic alkylsilane monolayer and a hydrophilic aminosilane monolayer were selectively coated on $SiO_2$ surface through the consecutive procedures of a micro-contact printing (${\mu}CP$) and dip-coating methods under extremely dry condition. On a SAM pattern cleaned with SC1 solution immediately after ${\mu}CP$, poly(3,4-ethylenedioxythiophene) (PEDOT) source and drain electrode array were very selectively and nicely vapour phase polymerized. On the other side, on a SC1-untreated SAM pattern, PEDOT array was very poorly polymerized. It strongly suggests that the SC1 cleaning process effectively removes unwanted contaminants on SAM pattern, thereby resulting in very selective growth of PEDOT electrode pattern.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제48권5호
• /
• pp.315-318
• /
• 1999

We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.