• Journal of the Korean Vacuum Society
• /
• v.16 no.3
• /
• pp.215-220
• /
• 2007

Thin films of $SBT(SrBi_2Ta_2O_9)$ having $Pt/SBT/Seed/Pt/Ti/SiO_2/Si$ structure were fabricated using self-seed layer method by R.F. Magnetron sputter. Self-seed layers were deposited at room temperature and $600^{\circ}C$, which had 30 nm thickness. To investigate crystallization of self-seed layer we characterized by XRD after various heat treatment. And we characterized the crystallinity and electrical properties of SBT on self-seed layer after various heat treatment.

• Journal of Ceramic Processing Research
• /
• v.19 no.5
• /
• pp.401-406
• /
• 2018

We investigated the effect of ZnO seed layer thickness on the density of ZnO nanorod arrays. ZnO has been deposited using two distinct processes consisting of the seed layer deposition using ALD and subsequent hydrothermal ZnO growth. Due to the coexistence of the growth and dissociation during ZnO hydrothermal growth process on the seed layer, the thickness of seed layer plays a critical role in determining the nanorod growth and morphology. The optimized thickness resulted in the regular ZnO nanorod growth. Moreover, the introduction of ALD to form the seed layer facilitates the growth of the nanorods on ultrathin seed layer and enables the densification of nanorods with a narrow change in the seed layer thickness. This study demonstrates that ALD technique can produce densely packed, virtually defect-free, and highly uniform seed layers and two distinctive processes may form ZnO as the final product via the initial nucleation step consisting of the reaction between $Zn^{2+}$ ions from respective zinc precursors and $OH^-$ ions from $H_2O$.

• Journal of the Korean Ceramic Society
• /
• v.40 no.2
• /
• pp.198-205
• /
• 2003

$Ba_{0.66}Sr_{0.34}TiO_3$ thin films and seed-layers were deposited on $Pt/Ti/SiO_2/Si$substrate by R.F. magnetron sputtering method. Effects of various substrate temperature conditions on electrical properties (such as capacitance and leakage current) of BST thin films were studied. The effect of seed-layer was also studied. When seed-layer was inserted between BST and Pt, the crystallization of the BST thin films was considerably improved and the processing temperature was lowered. Compared to the pure BST thin films, dielectric constant, dielectric loss, and leakage current of BST thin films deposited on the seed-layer were considerably improved. It could be revealed that electrical properties are influenced by the substrate temperatures of BST thin films and are enhanced by the seed-layer.

• Korean Journal of Materials Research
• /
• v.24 no.4
• /
• pp.186-193
• /
• 2014

A thin Cu seed layer for electroplating has been employed for decades in the miniaturization and integration of printed circuit board (PCB), however many problems are still caused by the thin Cu seed layer, e.g., open circuit faults in PCB, dimple defects, low conductivity, and etc. Here, we studied the effect of heat treatment of the thin Cu seed layer on the deposition rate of electroplated Cu. We investigated the heat-treatment effect on the crystallite size, morphology, electrical properties, and electrodeposition thickness by X-ray diffraction (XRD), atomic force microscope (AFM), four point probe (FPP), and scanning electron microscope (SEM) measurements, respectively. The results showed that post heat treatment of the thin Cu seed layer could improve surface roughness as well as electrical conductivity. Moreover, the deposition rate of electroplated Cu was improved about 148% by heat treatment of the Cu seed layer, indicating that the enhanced electrical conductivity and surface roughness accelerated the formation of Cu nuclei during electroplating. We also confirmed that the electrodeposition rate in the via filling process was also accelerated by heat-treating the Cu seed layer.

• Korean Journal of Materials Research
• /
• v.11 no.9
• /
• pp.802-809
• /
• 2001

Electroplating is an attractive alternative deposition method for copper with the need for a conformal and conductive seed layer In addition, the Cu seed layer should be highly pure so as not to compromise the effective resistivity of the filled copper interconnect structure. This seed layer requires low electrical resistivity, low levels of impurities, smooth interface, good adhesion to the barrier metal and low thickness concurrent with coherence for ensuring void-free fill. The electrical conductivity of the surface plays an important role in formation of initial Cu nuclei, Cu nucleation is much easier on the substrate with higher electrical conductivities. It is also known that the nucleation processes of Cu are very sensitive to surface condition. In this study, copper seed layers deposited by magnetron sputtering onto a tantalum nitride barrier layer were used for electroplating copper in the forward pulsed mode. Prior to electroplating a copper film, the Cu seed layer was cleaned by plasma H$_2$ and $N_2$. In the plasma treatment exposure tome was varied from 1 to 20 min and plasma power from 20 to 140W. Effects of plasma pretreatment to Cu seed/Tantalum nitride (TaN)/borophosphosilicate glass (BPSG) samples on electroplating of copper (Cu) films were investigated.

• Korean Journal of Materials Research
• /
• v.22 no.4
• /
• pp.190-194
• /
• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• Journal of Surface Science and Engineering
• /
• v.57 no.5
• /
• pp.406-415
• /
• 2024

Using DC magnetron sputtering, we deposited a bilayer composed of a seed layer consisting of Ti, Cr, Co, and Zr, and an overlayer of Ag on MgO(001) single crystal substrates, creating self-assembled nanostructures. When Ti was used as the seed layer, it was observed that the formed nano-dots inherently aggregated into dot shapes. Additionally, Cr, Co, and Zr were chosen to investigate their influence on SLAA(Seed layer Assisted Agglomeration) depending on the seed layer material, revealing different shapes of the formed nano-dots. Moreover, it was observed that aggregation was inhibited as the thickness of the seed layer exceeded a critical point. X-ray diffraction analysis of the Ti seed layer revealed epitaxial growth of Ag along the (001) direction of the MgO substrate. In contrast, no epitaxial growth was observed when Cr, Co, and Zr were used as seed layer materials. Ultimately, Ti was identified as the most suitable seed layer material for the fabrication of self-assembled nanostructures utilizing the aggregation phenomenon of the bilayer. This research is deemed sufficiently valuable in addressing the limitations associated with the low productivity and high cost of current nano thin film processes.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.125-126
• /
• 2007

Polycrystalline silicon thin-film-transistors (Poly-Si TFT's) with a amorphous-$Si_xGe_y$ seed layer have been fabricated to improve the performance of TFT. The dependence of crystal structure and electrical characteristics on the the Ge fractions in $Si_xGe_y$ seed layer were investigated. As a result, the increase of grain size and enhancement of electrical characteristics were obtained from the poly-Si TFT's with amorphous-SixGey seed layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.204-205
• /
• 2007

Self-seed 층을 이용한 PLZT(9/65/35), 강유전체 박막을 Sol-Gel 법을 이용해 Pt/Ti/$SiO_2$/Si 기판 위에 증착한 후, Self-seed 층에 의한 PLZT(9/65/35) 박막의 구조적, 전기적 특성을 고찰하였다. Seed 층을 도입하지 않은 PLZT 박막의 경우 다결정 상으로 형성되는 것을 알 수 있었으며, seed 층을 도입한 PLZT 박막은 (110) 방향으로 우선 배향됨을 알 수 있었다. 증착된 PLZT(9/65/35) 박막의 유전율 및 유전손살은 10kHz에서 유전율 205, 유전손살 0.029 이었으며, Self-seed layer를 도입한 PLZT 박막의 경우 seed layer를 도입하지 않은 PLZT 박막보다 낮은 온도에서 결정화 되는 것을 관찰 할 수 있었다. Self-seed layer가 도입된 PLZT(9/65/35) 박막의 경우 잔류분극 ($P_r$) 값은 $9.1{\mu}C/cm^2$, 항전계($E_c$)는 47 kV/cm을 나타내었다.