• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.852-855
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• 2005

This paper introduces a case study of designing a cryptographic processor dedicated to VPN/SSL system. The designed processor supports not only block cipher algorithm, including 3DES, AES, and SEED, but also 163 bit ECC public key crypto algorithm. Moreover, we adopted PCI Master interface in the design, which guarantees fast computation of cryptographic algorithm prevalent in general information security systems.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.34 no.1
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• pp.71-82
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• 2024

With the advancement of information and communication technology (ICT), the use of electronic document types such as PDF, MS Office, and HWP files has increased. Such trend has led the cyber attackers increasingly try to spread malicious documents through e-mails and messengers. To counter such attacks, AI-based methodologies have been actively employed in order to detect malicious document files. The main challenge in detecting malicious HWP(Hangul Word Processor) files is the lack of quality dataset due to its usage is limited in Korea, compared to PDF and MS-Office files that are highly being utilized worldwide. To address this limitation, data augmentation have been proposed to diversify training data by transforming existing dataset, but as the usefulness of the augmented data is not evaluated, augmented data could end up harming model's performance. In this paper, we propose an effective semi-supervised learning technique in detecting malicious HWP document files, which improves overall AI model performance via quantifying the utility of augmented data and filtering out useless training data.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 2002.11a
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• pp.242-245
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• 2002

본 논문은 ARM7TDMI 프로세서를 사용하여 유한체 GF(2$^{m}$ ) 상에 정의된 타원곡선 암호시스템을 구현한 결과를 제시한다. 타원곡선의 점을 표현하는 좌표계에 따른 비교를 하였고, 사전 계산과 사전 계산을 하지 않는 알고리즘의 구현 결과를 비교하고 있다.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1998.12a
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• pp.137-147
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• 1998

RSA 암호 시스템에서 512비트 이상의 큰 정수 소수의 모듈라 멱승 연산이 필요하기 때문에 효율적인 암호화 및 복호화를 위해서는 모듈라 멱승 연산의 고속 처리가 필수적이다. 따라서 본 논문에서는 몫을 추정하여 모듈라 감소를 실행하고 carry-save 덧셈과 중간 곱의 크기를 제한하는 interleaved 모듈라 곱셈 및 감소 기법을 이용하여 모듈라 멱승 연산을 수행하는 고속 모듈라 멱승 연산 프로세서를 논리 자동 합성 기법을 바탕으로 하는 탑다운 선계 방식으로 VHDL을 이용하여 모델링하고 SYNOPSIS 툴을 이용하여 합성 및 검증한 후 XILINX XC4025 FPGA에 구현하여 성능을 평가 및 분석한다.

• Journal of information and communication convergence engineering
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• v.1 no.4
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• pp.213-216
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• 2003

A VPN is widely used in a communications environment which access is controlled to permit peer connections only within a defined community of interest. It is constructed through some form of partitioning of a common underlying communication medium, where this underlying communications medium provides services to the network on a non-exclusive basis. In this paper, we have analyzed a variety of architecture to implement Giga bps VPN system. The proposed architecture will satisfy the needs of clients who adopt Giga bps VPN system in the various environments.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 2001.11a
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• pp.228-231
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• 2001

인터넷의 활용이 급속하게 증가하여 인터넷에서의 정보보호에 대한 필요성이 대두되면서 표준화된 인터넷 정보보호 프로토콜인 IPsec이 등장하게 되었다. 이러한 IPsec은 현재 여러 가지 플랫폼에서 구현되고 있으며, 이러한 구현은 일반적으로 IP 계층에 통합하는 방법, BITS, BITW 중 하나의 방법론을 선택하고 있다. BITW는 outboard crypto processor를 사용하여 물리적인 인터페이스 카드 내에 IPsec을 구현하는 방법으로 효율성이 문제가 되므로 본 논문에서는 IP 계층에 통합하는 방법과 BITS 방법을 중심으로 장단점을 분석한다. 이에 본 논문은 리눅스 커널 상에서 IPsec을 구현하기 위해 리눅스 커널 모듈을 분석하고 가장 효율적이라 생각되는 IP 계층에 통합된 IPsec을 구현하는 방법을 제안한다.

• The KIPS Transactions:PartC
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• v.14C no.4
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• pp.313-320
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• 2007

In this paper, we propose a method to analyze security vulnerabilities of MS word-processor by checking the validation of its input files. That is, this study is to detect some vulnerabilities in the input file of the word processor by analyzing the header information of its input file. This validation test can not be conducted by the existing software fault injection tools including Holodeck and CANVAS. The proposed method can be also applied to identify the input file vulnerabilities of Hangul and Microsoft Excel which handle a data file with a header as an input. Moreover, our method can provide a means for assessing the fault tolerance and trustworthiness of the target software.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.5B
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• pp.526-531
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• 2009

In this paper, we propose new novel technique (ILCT: Instruction-Level Correlation Technique) which can detect tempered instructions by software attacks or hardware attacks before their execution. In conventional works, due to both high complex computation of cipher process and low processing speed of cipher modules, existing secure processor architecture applying cipher technique can cause serious performance degradation. While, the secure processor architecture applying ILCT with FEC does not incur excessive performance decrease by complexity of computation and speed of tampering detection modules. According to experimental results, total memory overhead including parity are increased in average of 26.62%. Also, secure programs incur CPI degradation in average of $1.20%{\sim}1.97%$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.1107-1111
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• 2005

The DVR system realization with watermarking and MPEG-4 for real time processing speed improvement is presented in this paper. For the real time processing the system is used the DSP processor, Quick DMA for data transmission, watermarking for security and MPEG-4 compression for facility. The algorithms are that the operational structure has the internal memory of processor, and the optimal realization is suitable to form the DSP processor structure r processed for the iterative operations. The experimental result shows the real time processing is improved 12% over for the D1 image in comparison with the other system.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.66 no.4
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• pp.252-257
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• 2017

In this paper for developing and implementing the HD level triple streaming hybrid security camera which output the three type of video outputs(HD-SDI, EX-SDI, Analog). We design the hardware and program the firmware supporting the main and sub functions. We use MN34229PL as image sensor, EN778, EN331 as image processor, KA909A as reset, iris, day&night function part, A3901SEJTR-T as zoom/focus control part. We request the performance test of developed security camera at the broadcasting and communication fusion testing department of TTA (Telecommunication Technology Association). We can get the three outputs (HD-SDI, EX-SDI, Analog) from the developed security camera, get the world best level at the jitter and eye pattern amplitude value and exceed the world best level at the signal/noise ratio, and minium illumination, power consumption part. The HD level triple streaming hybrid security camera in this paper will be widely used at the security camera because of the better performance and function.