• Korean Journal of Materials Research
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• v.11 no.9
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• pp.781-785
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• 2001

The thermal behavior of Flow Pattern Defect (FPD) and Large Pit (LP) in Czochralski Silicon crystal was investigated by applying high temperature annealing ($\geq$$1100^{\circ}C$) and non-agitated Secco etching. For evaluation of the effect of LP upon device performance/yield, commercial DRAM and ASIC devices were fabricated. The results indicated that high temperature annealing generates LPs whereas it decreases FPD density drastically. However, the origins of FPD and LP seemed to be quite different by not showing any correspondence to their density and the location of LP generation and FPD extinction. By not showing any difference between the performance/yield of devices whose design rule is larger than 0.35 $\mu\textrm{m}$, LP seemed not to have detrimental effects on the performance/yield.

• Journal of Conservation Science
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• v.19
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• pp.43-56
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• 2006

We checked the conditions and material properties after producing the lime finishing layers with a mortar mix of processed lime. In addition, we reproduced the lime finishing layers of the Koguryo Tomb Murals, colored the layers with a few different techniques and identified the characteristics for each painting technique. As a result of the experiment, we could infer the producing techniques as well as teaming the conditions and properties of the lime finishing layers of the Koguryo tomb murals, and examined the maintenance of the lime finishing layers. Of those samples produced under various conditions, the layers of slaked lime, which were obtained after being hydrated underground for a long time, showed quite a good condition. Thus the slaked lime mixes produced through particular hydration methods are judged to increase the maintenance of the lime finishing layers of the Koguryo Tomb Murals. Mostly, the paints of Koguryo Tomb Murals indicated that they have similar conditions with the samples produced with a secco method. In addition, Considering the compositional forms of the painting layers and the boundary layers which formed between the painting layers and the finishing layers, we can verify that, in some cases, the conditions of the painting layers of the Koguryo tomb murals are similar to those which were produced with a combination of fresco and secco.

• Conservation Science in Museum
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• v.6
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• pp.47-54
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• 2005

The elements of the pigments used on the wall painting in Ssangyeongchong (Tomb of Two Pillars) from Goguryeo in the Nampo area of Pyeongyang were analyzed to confirm their mineral compositions and features of the painting. Specifically, the non-destructive X-ray fluorescence spectrometer (XRF) was used. On the other hand, the mineral composition of the background and pigment layers were analyzed using an X-ray diffractometer (XRD). The results of these analyses suggested that the lips of the characters in the painting were painted with HgS, and their faces, painted with HgS(Cinnabar/ vermilion) mixed with CaCO₃. Note that lead white pigment [2PbCO₃·Pb(OH)₂] was found only on the bottom layer of the painting, indicating that the wall painting was likely to have been created using the Secco method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.4
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• pp.67-72
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• 1989

Room Temperature Plasma Nitridation of silicon was investigated as a new LOCOS (local oxidation of silicon) process in order to reduce the bird's beak length. In $N_2$ plasma formed by 100kHz, 400W AC power, a thin silicon nitride film (<100${\AA}$) was uniformly grown on a silicon substrate. SEM studies showed that the nitride layer formed by this method can effectively protect the silicon from oxidation and reduce the bird's beak length to $0.2{mu}m$ when 4000${\AA}$ field oxide is grown. This is a considerable improvement comparing with 0.7${mu}m,$ the bird's beak, for the conventional LOCOS process using a thick LPCVD nitride. No appreciable crystalline defect could be found around the bird's beak with SEM cross-section afrer Secco etch. Leakage current tests were carried out on the $N^+/P^-$ well and $P^+/N^-$ well diodes formed by this new LOCOS process. The electrical tests indicate that this new process has electrical properties similar or superior to those of the conventional LOCOS process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.17-20
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• 1998

Thermal behavior of Flow Pattern Defect (FPD) and Large Pit (LP) in Czochralski Silicon crystals was investigated by applying high temperature ($\geq$1100$^{\circ}C$) annealing and non-agitation Secco etching. For evaluation of the effect of LP upon device performance / yield, DRAM and ASIC devices were fabricated. The results indicate that high temperature annealing generates LPs whereas it decreases FPD density drastically, and LP does not have detrimental effects on the performance /

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.413-419
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• 2004

Recently, Silicon On Insulator (SOI) devices emerged to achieve better device characteristics such as higher operation speed, lower power consumption and latch-up immunity. Nevertheless, there are many detrimental defects in SOI wafers such as hydrofluoric-acid (HF)-defects, pinhole, islands, threading dislocations (TD), pyramid stacking faults (PSF), and surface roughness originating from quality of buried oxide film layer. Although the number of defects in SOI wafers has been greatly reduced over the past decade, the turn over of high-speed microprocessors using SOI wafers has been delayed because of unknown defects in SOI wafers. A new characterization method is proposed to investigate the crystalline quality, the buried oxide integrity and some electrical parameters of bonded SOI wafers. In this study, major surface defects in bonded SOI are reviewed using HF dipping, Secco etching, Cu-decoration followed by focused ion beam (FIB) and transmission electron microscope (TEM).

• Solar Energy
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• v.19 no.3
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• pp.125-131
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• 1999

This paper deals with a novel structure of poly-Si solar cell. A grain boundary(GB) of poly-Si acts as potential barrier and recombination center for photo-generated carriers. To reduce unwanted side effects at the GB of poly-Si, we employed physical GB removal of poly-Si using chemical solutions. Various chemical etchants such as Sirtl, Yang, Secco, and Schimmel were investigated for the preferential GB etching. Etch depth about 10 ${\mu}m$ was achieved by a Schimmel etchant. After a chemical etching of poly-Si, we used $POCl_3$ for emitter junction formation. This paper used an easy method of top electrode formation using a RF sputter grown ITO film. ITO films with thickness of 300 nm showed resistivity of $1.26{\times}10^{-4}{\Omega}-cm$ and overall transmittance above 80%. Using a preferential GB etching and ITO top electrode, we developed a new fabrication procedure of poly-Si solar cells. Employing optimized process conditions, we were able to achieve conversion efficiency as high as 16.6% at an input power of 20 $mW/cm^2$. This paper investigates the effects of process parameters: etching conditions, ITO deposition factors, and emitter doping densities in a poly-Si cell fabrication procedure.

• Korean Journal of Materials Research
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• v.9 no.5
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• pp.503-508
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• 1999

We have investigated the physical and diffusion barrier property of Ti-Si-N film for Cu metallization. The ternary compound was deposited by using reactive rf magnetron sputtering of a TiSi$_2$target in an Ar/$N_2$gas mixture. Resistivities of the films were in range of 358$\mu$$\Omega$-cm, to 307941$\mu$$\Omega$-cm, and tended to increase with increasing the $N_2$/Ar flow rate ratio. The crystallization of the Ti-Si-N compound started to occur at 100$0^{\circ}C$ with the phases of TiN and Si$_3$N$_4$identified by using XRD(X-ray Diffractometer). The degree of the crystallization was influenced by the $N_2$/Ar flow ratio. The diffusion barrier property of Ti-Si-N film for Cu metallization was determined by AES, XRD and etch pit by secco etching, revealing the failure temperature of 90$0^{\circ}C$ in 43~45at% of nitrogen content. In addition, the very thin compound (10nm) with 43~45at% nitrogen content remained stable up to $700^{\circ}C$. Furthermore, thermal treatment in vacuum at $600^{\circ}C$ improved the barrier property of the Ti-Si-N film deposited at the $N_2$(Ar+$N_2$) ratio of 0.05. The addition of Ti interlayer between Ti-Si-N films caused the drastic decrease of the resistivity with slight degradation of diffusion barrier properties of the compound.