• 제목/요약/키워드: Scheduler

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Comprehensive Investigations on QUEST: a Novel QoS-Enhanced Stochastic Packet Scheduler for Intelligent LTE Routers

  • Paul, Suman;Pandit, Malay Kumar
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제12권2호
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    • pp.579-603
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    • 2018
  • In this paper we propose a QoS-enhanced intelligent stochastic optimal fair real-time packet scheduler, QUEST, for 4G LTE traffic in routers. The objective of this research is to maximize the system QoS subject to the constraint that the processor utilization is kept nearly at 100 percent. The QUEST has following unique advantages. First, it solves the challenging problem of starvation for low priority process - buffered streaming video and TCP based; second, it solves the major bottleneck of the scheduler Earliest Deadline First's failure at heavy loads. Finally, QUEST offers the benefit of arbitrarily pre-programming the process utilization ratio.Three classes of multimedia 4G LTE QCI traffic, conversational voice, live streaming video, buffered streaming video and TCP based applications have been considered. We analyse two most important QoS metrics, packet loss rate (PLR) and mean waiting time. All claims are supported by discrete event and Monte Carlo simulations. The simulation results show that the QUEST scheduler outperforms current state-of-the-art benchmark schedulers. The proposed scheduler offers 37 percent improvement in PLR and 23 percent improvement in mean waiting time over the best competing current scheduler Accuracy-aware EDF.

컴퓨팅 자원 및 네트워크 자원의 관리를 위한 티켓 기반 글로벌 스케줄러에 관한 연구 (A Study on Global Scheduler for Computing Resources and Network Resources Management)

  • 임창선;안성진;정진욱;박진섭
    • 융합보안논문지
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    • 제9권4호
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    • pp.13-19
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    • 2009
  • 본 논문에서는 그리드 자원을 통합 관리하기 위한 글로벌 스케줄러에 대한 연구를 진행하고, 이에 대한 설계 방안을 제시한다. 글로벌 스케줄러에 대한 연구로서 그리드 시스템과 글로벌 스케줄러 시스템의 개념에 대하여 이해하고, 글로벌 스케줄러를 구성하는데 필요한 조건들을 확인하였다. 그리고 세계 다른 글로벌 스케줄러 시스템과 차별성을 두기 위한 티켓 기반 시스템 개념을 도입을 하였다. 최종적으로 본 논문에서 제안한 글로벌 스케줄러 시스템 설계에 대한 확인을 위하여 프로토타입 제작을 통해 실제 적용되어 사용 될 수 있는지 여부를 확인하였다.

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원자력 안전계통의 실시간 스케쥴러 구현 (Realization of Real-time Scheduler for Nuclear Safety System)

  • 박동철;김태연;유준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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    • pp.215-216
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    • 2007
  • This paper presents a real-time scheduler for nuclear safety system. According to constraints and requirements of nuclear safety system, scheduler design analysis is done and algorithms are developed for implementation. Using DSP based hardware, a real-time scheduler is realized. Consequently, this paper shows the performance of periodical software through the monitoring program.

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TDD/CDMA망에서의 업링크 트래픽을 위한 DiffServ 지원 스케줄러 설계 (A Design of DiffServ Supporting Scheduler for uplink traffics in TDD/CDMA Networks)

  • 장석구;김영한
    • 정보처리학회논문지C
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    • 제12C권5호
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    • pp.717-724
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    • 2005
  • 본 논문은 다양한 요구조건을 가진 멀티미디어 클래스를 지원하는 차세대 무선망에서 효율적으로 적용될 수 있는 무선 액세스망 스케줄러를 제안한다. 제안하는 스케줄러는 클래스 단위의 차등화된 서비스를 보장하면서 전송률을 높이고 패킷의 손실률을 낮출 수 있도록 설계되었다. 이를 적용하기 위한 무선망은 TDD/CDMA 시스템을 기반으로 하였고, 특정 클래스에 속하는 사용자들의 패킷을 효율적으로 스케줄링하기 위하여 사용자별 전용 슬롯을 프레임 단위 내에 할당하여 처리했다. 이를 통해 효율적인 슬롯 할당은 물론 서로 다른 QoS 요청을 만족시킬 수 있다. 본 논문은 또한 시뮬레이션을 이용해서 기존에 제안된 스케줄링 방안과의 성능 비교를 수행하는 것으로 제안된 스케줄링 알고리즘의 특성 및 장점을 고찰한다.

스마트 무인기의 천이 스케줄러 설계개선 (Design Update of Transition Scheduler for Smart UAV)

  • 강영신;유창선;김유신;안성준
    • 한국항공운항학회지
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    • 제13권2호
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    • pp.14-26
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    • 2005
  • A tilt-rotor aircraft has various flight modes : helicopter, airplane, and conversion. Each of flight mode has unique and nonlinear flight characteristics. Therefore the gain schedules for whole flight envelope are required for effective flight performance. This paper proposes collective, flap, and nacelle angle scheduler for whole flight envelope of the Smart UAV(Unmanned Air Vehicle) based on CAMRAD(Comprehensive Analytical Model of Rotorcraft Aerodynamics and Dynamics) II analysis results. The scheduler designs are improved so that the pitch attitude angle of helicopter mode was minimized. The range of scheduler are reduced inside of engine performance limits. The conversion corridor and rotor governor are suggested also.

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A Rijndael Cryptoprocessor with On-the-fly Key Scheduler

  • Shim, Joon-Hyoung;Bae, Joo-Yeon;Kang, Yong-Kyu;Park, Jun-Rim
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.944-947
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    • 2002
  • We implemented a cryptoprocessor with a on-the-fly key scheduler which performs forward key scheduling for encryption and reverse key scheduling for decryption. This scheduler makes the fast generation of the key value and eliminates the memory for software key scheduler. The 128-bit Rijndael processor is implemented based on the proposed architecture using Verilog-HDL and targeted to Xilinx XCV1000E FPGA device. As a result, the 128-bit Rijndael operates at 38.8MHz with on-the-fly key scheduler and consumes 11 cycles for encryption and decryption resulting in a throughput of 451.5Mbps

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Blackboard Scheduler Control Knowledge for Recursive Heuristic Classification

  • Park, Young-Tack
    • 지능정보연구
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    • 제1권1호
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    • pp.61-72
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    • 1995
  • Dynamic and explicit ordering of strategies is a key process in modeling knowledge-level problem-solving behavior. This paper addressed the important problem of howl to make the scheduler more knowledge-intensive in a way that facilitates the acquisition, integration, and maintenance of the scheduler control knowledge. The solution a, pp.oach described in this paper involved formulating the scheduler task as a heuristic classification problem, and then implementing it as a classification expert system. By doing this, the wide spectrum of known methods of acquiring, refining, and maintaining the knowledge of a classification expert system are a, pp.icable to the scheduler control knowledge. One important innovation of this research is that of recursive heuristic classification : this paper demonstrates that it is possible to formulate and solve a key subcomponent of heuristic classification as heuristic classification problem. Another key innovation is the creation of a method of dynamic heuristic classification : the classification alternatives that are selected among are dynamically generated in real-time and then evidence is gathered for and aginst these alternatives. In contrast, the normal model of heuristic classification is that of structured selection between a set of preenumerated fixed alternatives.

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HIGHT 암복호화 병렬 실행을 위한 Key Scheduler 설계 (Design of a Key Scheduler for Supporting the Parallel Encryption and Decryption Processes of HIGHT)

  • 최원정;이제훈
    • 센서학회지
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    • 제24권2호
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    • pp.107-112
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    • 2015
  • HIGHT is an 64-bit block cipher, which is suitable for low power and ultra-light implementation that are used in the network that needs the consideration of security aspects. This paper presents a parallel key scheduler that generates the whitening keys and subkeys simultaneously for both encryption and decryption processes. We construct the reverse LFSR and key generation blocks to generate the keys for decryption process. Then, the new key scheduler is made by sharing the common logics for encryption and decryption processes to minimize the increase in hardware complexity. From the simulation results, the logic size is increased 1.31 times compared to the conventional HIGHT. However, the performance of HIGHT including the proposed key scheduler can be increased by two times compared to the conventional counterpart.

Radio Resource Scheduling Approach For Femtocell Networks

  • Alotaibi, Sultan
    • International Journal of Computer Science & Network Security
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    • 제22권4호
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    • pp.394-400
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    • 2022
  • The radio resources available in a wireless network system are limited. Therefor, job of managing resources is not easy task. Because the resources are shared among the UEs that are connected, the process of assigning resources must be carefully controlled. The packet scheduler in an LTE network is in charge of allocating resources to the user equipment (UE). Femtocells networks are being considered as a promising solution for poor channel performance for mulitple environments. The implementation of femtocells into a macrocell (traditional base station) would boost the capacities of the cellular network. To increase femtocells network capacity, a reliable Packet Scheduler mechanism should be implemented. The Packet Scheduler technique is introduced in this paper to maximize capacity of the network while maintaining fairness among UEs. The proposed solution operates in a manner consistent with this principle. An analysis of the proposed scheme's performance is conducted using a computer simulation. The results reveal that it outperforms the well-known PF scheduler in terms of cell throughput and average throughput of UEs.

KAWS: Coordinate Kernel-Aware Warp Scheduling and Warp Sharing Mechanism for Advanced GPUs

  • Vo, Viet Tan;Kim, Cheol Hong
    • Journal of Information Processing Systems
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    • 제17권6호
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    • pp.1157-1169
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    • 2021
  • Modern graphics processor unit (GPU) architectures offer significant hardware resource enhancements for parallel computing. However, without software optimization, GPUs continuously exhibit hardware resource underutilization. In this paper, we indicate the need to alter different warp scheduler schemes during different kernel execution periods to improve resource utilization. Existing warp schedulers cannot be aware of the kernel progress to provide an effective scheduling policy. In addition, we identified the potential for improving resource utilization for multiple-warp-scheduler GPUs by sharing stalling warps with selected warp schedulers. To address the efficiency issue of the present GPU, we coordinated the kernel-aware warp scheduler and warp sharing mechanism (KAWS). The proposed warp scheduler acknowledges the execution progress of the running kernel to adapt to a more effective scheduling policy when the kernel progress attains a point of resource underutilization. Meanwhile, the warp-sharing mechanism distributes stalling warps to different warp schedulers wherein the execution pipeline unit is ready. Our design achieves performance that is on an average higher than that of the traditional warp scheduler by 7.97% and employs marginal additional hardware overhead.