• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 D
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• pp.2856-2858
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• 2000

This paper proposes a scan code method for obstacle avoidance of mobile robot. Obstacles detected in a circular window are converted to scan codes and then to the steering angle. The safe rotating radius is obtained by the scan code to avoid the collision between robot and obstacle and. the minimum distance for rotation is calculated. Effectiveness of the method is illustrated through simulations, and the results show that the proposed method can be efficiently implemented to an unknown environment.

• 한국통신학회논문지
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• 제27권1A호
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• pp.66-72
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• 2002

본 논문에서 구현한 GenJTAG은 기판 수준의 테스팅을 위한 정보와 BIST(Built-In Self Test)에 대한 정보를 입력으로 받아 verilog-HDL 코드로 기술된 경계 주사 회로를 자동 생성해 주는 설계 자동화 툴이다. 대부분이 상용 툴들은 생성된 회로를 게이트 수준의 회로로 제공하기 때문에 사용자가 선택적으로 사용할 수 있는 BIST 관련 명령어를 회로에 추가하기가 어려운데 반해, 본 논문에서 구현한 툴은 사용자가 정의한 정보에 의해 BIST 관련 명령어를 지원할 수 있는 behavioral 코드의 경계 주사 회로를 생성하여 준다. 또한 behavioral 코드를 제공함으로써 사용자에 의한 수정을 용이하도록 하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.582-594
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• 2016

Various test data compression techniques have been developed to reduce the test costs of system-on-a-chips. In this paper, a scan chain reordering algorithm for code-based test data compression techniques is proposed. Scan cells within an acceptable relocation distance are ranked to reduce the number of conflicts in all test patterns and rearranged by a positioning algorithm to minimize the routing overhead. The proposed method is demonstrated on ISCAS '89 benchmark circuits with their physical layout by using a 180 nm CMOS process library. Significant improvements are observed in compression ratio and test power consumption with minor routing overhead.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제17권4호
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• pp.1296-1309
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• 2023

In this paper, based on the soft cancellation (SCAN) bit-flipping (SCAN-BF) algorithm, a generalized SCAN bit-flipping (GSCAN-BF-Ω) decoding algorithm is carried out, where Ω represents the number of bits flipped or corrected at the same time. GSCAN-BF-Ω algorithm corrects the prior information of the code bits and flips the prior information of the unreliable information bits simultaneously to improve the block error rate (BLER) performance. Then, a joint threshold scheme for the GSCAN-BF-2 decoding algorithm is proposed to reduce the average decoding complexity by considering both the bit channel quality and the reliability of the coded bits. Simulation results show that the GSCAN-BF-Ω decoding algorithm reduces the average decoding latency while getting performance gains compared to the common multiple SCAN bit-flipping decoding algorithm. And the GSCAN-BF-2 decoding algorithm with the joint threshold reduces the average decoding latency further by approximately 50% with only a slight performance loss compared to the GSCAN-BF-2 decoding algorithm.

• 전자공학회논문지 IE
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• 제45권3호
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• pp.5-12
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• 2008

디지털 논리회로의 테스트 데이터와 전력소비를 단축시킬 수 있는 효율적인 테스트 방법을 제안한다. 제안 하는 테스트 방법은 테스트장비내의 테스트 데이터 저장 공간을 줄이는 하이브리드 run-length 인코딩 벙법에 기초하고, 수정된 Bus-invert 코딩 방법과 스캔 셀 설계를 제안하여, 스캔 동작시의 개선된 전력 단축효과를 가져온다. ISCAS'89 벤치마크 회로의 실험결과 고장 검출율의 저하 없이 평균 전력은 96.7%, 피크전력은 84%의 단축을 보이며 테스트 데이터는 기존 방법보다 78.2%의 압축을 갖는다.

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 2001년도 춘계학술발표회요약집
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• pp.89.1-89
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• 2001

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제18권5호
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• pp.1412-1430
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• 2024

The soft cancellation list (SCANL) decoding algorithm for polar codes runs L soft cancellation (SCAN) decoders with different decoding factor graphs. Although it can achieve better decoding performance than SCAN algorithm, it has high latency. In this paper, a fast simplified SCANL (Fast-SSCANL) algorithm that runs L independent Fast-SSCAN decoders is proposed. In Fast-SSCANL decoder, special nodes in each factor graph is identified, and corresponding low-latency decoding approaches for each special node is propose first. Then, syndrome check aided Fast-SSCANL (SC-Fast-SSCANL) algorithm is further put forward. The ordinary nodes satisfied the syndrome check will execute hard decision directly without traversing the factor graph, thereby reducing the decoding latency further. Simulation results show that Fast-SSCANL and SC-Fast-SSCANL algorithms can achieve the same BER performance as the SCANL algorithm with lower latency. Fast-SSCANL algorithm can reduce latency by more than 83% compared with SCANL, and SC-Fast-SSCANL algorithm can reduce more than 85% latency compared with SCANL regardless of code length and code rate.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2002년도 추계학술대회 논문집
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• pp.1037-1040
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• 2002

In micro-stereolithography technology, fabrication conditions that include laser power, laser scan speed, laser scan pitch, and material property of photopolymer such as penetration depth and critical exposure are considered as major process variables. But the existing scan path generation methods based only on CAD model have not taken them into account, which has resulted in cross-section dimension of low accuracy. Thus, to enhance cross-section dimensional accuracy, the physical resin solidification n phenomena should be reflected in laser scan path generation and stage operating code. In this paper, multi-line experiments based on single line solidification model are performed. And the method for improving cross-section dimensional accuracy is presented, which is to apply the database based on experimental results to laser scan path generation.

• 대한전자공학회논문지SD
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• 제41권11호
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• pp.115-121
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• 2004

본 논문에서 구현한 GenJTAG은 웹기반 경계 주사 회로 자동 생성기이다. GenJTAG은 경계 주사 기법의 공개 명령어를 모두 지원하고 다른 테스트 용이화 기법을 위한 특수 명령어를 지원할 수 있는 경계 주사 회로를 생성하여 준다. 생성된 경계주사 회로는 행위 수준 verilog-HDL 코드로 기술되므로 요구 사항이 변경될 경우 사용자가 용이하게 수정할 수 있다. 특히, GenJTAG은 웹을 통하여 사용할 수 있으므로 누구나 쉽게 경계 주사 회로를 생성할 수 있는 이점이 있다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.256-259
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• 2003

This paper proposes OPTICAL MARKER fer registering process - one of the 3D measurement process : scan registering - merging - measurement. If the registering work is carried out manually, it can be accompanied with much time and many errors. Because the patterned marker make registering process automatic, many firms use it now. But the physical shape of existing markers is the source of the data loss caused by hiding surface, and the marker arrangement is the source of the time loss. The optical marker proposed in this paper has marker generator, organized a large number of binary coded control laser diode, separate from 3D scan object. So, it does not take much time for the marker disposition, and it is not the origin of the data loss, and the binary coded laser information make the auto-registering possible.