• ETRI Journal
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• 제33권3호
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• pp.407-414
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• 2011

In an effort to reduce energy consumption, research into adaptive power management in real-time systems has become widespread. In this paper, a novel dynamic voltage scaling scheme is proposed for multiprocessor systems. Based on the concept of the Nash bargaining solution, a processor's clock speed and supply voltage are dynamically adjusted to satisfy these conflicting performance metrics. In addition, the proposed algorithm is implemented to react adaptively to the current system conditions by using an adaptive online approach. Simulation results clearly indicate that the superior performance of the proposed scheme can strike the appropriate performance balance between contradictory requirements.

• 제어로봇시스템학회논문지
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• 제14권6호
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• pp.580-586
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• 2008

Icing cloud generation system was developed to perform the in-flight icing simulation test for T-50 Supersonic Jet Trainer on the ground. The developed system successfully generated the almost natural icing cloud in the super-cooled state (liquid state) below freezing point and with the required LWC (Liquid Water Content). For full-scale aircraft icing test, an icing scaling method was adopted due to the limitation of wind generation speed with open-circuit type blower and its applicability was experimentally verified. Under the required in-flight icing condition based on the icing scaling method, T-50 aircraft subsystems were successfully operated and functionally checked.

• Journal of Information Processing Systems
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• 제7권1호
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• pp.93-102
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• 2011

In deeply scaled CMOS technologies, two major non-ideal factors are threatening the survival of the CMOS; i) PVT (process, voltage, and temperature) variations and ii) leakage power consumption. In this paper, we propose a novel post-silicon tuning methodology to scale optimum voltage and frequency "dynamically". The proposed design technique will use our PVT sensor circuits to monitor the variations and based on the monitored variation data, voltage and frequency will be compensated "automatically". During the compensation process, supply voltage is dynamically adjusted to guarantee the minimum total power consumption without violating the frequency requirement. The simulation results show that the proposed technique can reduce the total power by 85% and the static power by 53% on average for the selected ISCAS'85 benchmark circuits with 45 nm CMOS technology compared to the results of the traditional PVT compensation method.

• ETRI Journal
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• 제36권4호
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• pp.591-598
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• 2014

This paper proposes a new min-sum algorithm for low-density parity-check decoding. In this paper, we first define the negative and positive effects of the received signal-to-noise ratio (SNR) in the min-sum decoding algorithm. To improve the performance of error correction by considering the negative and positive effects of the received SNR, the proposed algorithm applies adaptive scaling factors not only to extrinsic information but also to a received log-likelihood ratio. We also propose a combined variable and check node architecture to realize the proposed algorithm with low complexity. The simulation results show that the proposed algorithm achieves up to 0.4 dB coding gain with low complexity compared to existing min-sum-based algorithms.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.250-250
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• 2010

The random telegraph signal (RTS) for the NOR flash cell scaling is investigated. An innovative method to suppress the RTS, based on the device engineering, is proposed. By optimizing the channel doping profile and using the high-k tunnel dielectric, it is confirmed from three-dimensional (3-D) simulation, that the $V_{th}$ amplitude, dueto RTS, is significantly suppressed, from approximately 0.5 to 0.07 V in the middle of the channel at 45 nm NOR Flash technology. From this result, it is expected that the proposed method to suppress the RTS amplitude is essential for further cell size scaling in Flash memory.

• 대한전자공학회논문지SD
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• 제40권10호
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• pp.24-31
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• 2003

Super-steep retrograded channel (SSR)을 갖는 bulk MOSFET, fully-depleted SOI, double-gate MOSFET 구조에 대하여 단채널 효과를 비교 분석하였다. Evanescent-mode를 이용하여, 각 소자 구조에 대한 characteristics scaling-length (λ)를 추출할 수 있는 수식을 유도하고 추출된 λ의 정확도를 소자 시뮬레이션 결과와 비교하여 검증하였다. 70 nm CMOS 기술에 사용 가능하도록 단채널 효과를 효과적으로 제어하기 위해서는 최소 게이트 길이가 5λ 이상이어야 하며 SSR 소자의 공핍층 두께는 약 30 nm 정도로 스케일링되어야 한다. High-κ 절연막은 equivalent SiO2 두께를 매우 작게 유지하지 않을 경우 절연막을 통한 드레인 전계의 침투 때문에 소자를 스케일링하는데 제한을 갖는다.

• 전력전자학회논문지
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• 제17권5호
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• pp.423-430
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• 2012

An adaptive maximum power point tracking (MPPT) scheme employing a variable scaling factor is presented. A MPPT control loop was constructed analytically and the magnitude variation in the MPPT loop gain according to the operating point of the PV array was identified due to the nonlinear characteristics of the PV array output. To make the crossover frequency of the MPPT loop gain consistent, the variable scaling factor was determined using an approximate curve-fitted polynomial equation about linear expression of the error. Therefore, a desirable dynamic response and the stability of the MPPT scheme were maintained across the entire MPPT voltage range. The simulation and experimental results obtained from a 3 KW rated prototype demonstrated the effectiveness of the proposed MPPT scheme.

• 한국항공우주학회지
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• 제40권2호
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• pp.146-156
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• 2012

비행 중 결빙은 항공기 운용에 위험한 상황을 초래하게 되며, 개발 및 감항 인증 과정중 성능과 안전에 미치는 영향이 평가되어야 한다. 평가를 위한 결빙 풍동시험에서 스케일링 기법은 실제와 동등한 수집율과 결빙량이 모사되는 대체시험 조건을 결정하는 기법이다. 본 논문에서는 Olsen 및 Ruff-IV 기법과 무차원 Weber 수를 일치시켜 속도를 계산하는 방법을 적용하여 연구자들이 쉽게 이용할 수 있도록 스케일링 프로그램을 개발하였다. 동일조건에서 수행된 NASA 스케일링 결과와 비교하여 프로그램을 검증하였다. 또한 FAR Part 25 Appendix C를 적용한 스케일링 사례를 제시하고 결빙코드 FENSAP-ICE를 이용하여 스케일링 기법을 검증하였다.

• 한국정보통신학회논문지
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• 제16권9호
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• pp.2015-2020
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• 2012

본 연구에서는 이중게이트(Double Gate; DG) MOSFET에 스켈링이론을 적용할 때 두 개의 게이트에 의한 효과를 반영하기 위하여 스켈링인자에 가중치를 적용하여 문턱전압이하 특성을 해석하였다. 포아송방정식에 의한 전위분포를 구하기 위하여 전하분포는 가우스분포함수를 이용할 것이며 이의 타당성은 이미 여러 논문에서 입증하였다. 이 전위분포를 이용하여 단채널효과 중 문턱전압이동, 문턱전압이하 스윙, 드레인유도장벽감소 등을 스켈링인자에 대한 가중치의 변화에 따라 관찰하였다. 이중게이트 MOSFET의 구조적 특성상 채널길이에 대한 가중치는 0.1에서 1까지 사용하였으며 채널두께에 대한 가중치는 1에서 2까지 가중치를 사용하였다. 결과적으로 문턱전압 이하 스윙은 스켈링인자에 따라 거의 변화가 없었으나 가중치에 따라 변화하였으며 문턱전압이동 및 드레인유도 장벽감소 등은 스켈링인자에 따라 그리고 가중치에 따라 큰 변화를 보이는 것을 알 수 있었다.

• 한국항만학회지
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• 제15권1호
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• pp.37-46
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• 2001

Fuzzy logic control(FLC) is composed of three parts : fuzzy rule-bases, membership functions, and scaling factors. Well-defined fuzzy rule-base should contain proper physical intuition on the plant, so are needed lots of experiences of the skillful expert. When membership functions are considered, some parameters on the memberships function such as function shape, support, allocation density should be selected well. The rule of scaling factors is 'scaling'(amplifying or reducing) for both input and output signals of the FLC to fit in the membership function support and to operate the plant intentionally. To get a better performance of the FLC, it is necessary to adjust the parameters of the FLC. In general, the adaptation of the scaling factors is the most effective adjustment scheme, compared with that of the fuzzy rule-base or membership function parameters. This study proposes the adaptation scheme of the scaling factors. When the adaptation is performed on-line, the stability of the adaptive FLC should be guaranteed. The stable FLC system can be designed with stability analysis in the sense of Lyapunov stability. To adapt the scaling factors for the error signals, the concept of the conventional MRAC would be introduced into slightly modified form. A tracking accuracy of the control system would be enhanced by the modified shape and support of the membership function. The simulation is achieved on the pilot plant with the hydraulic steering control of a UCT(Unmanned Container Transporter) of which modeling dynamics have lots of severe uncertainties and modeling errors.